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    THIN FILM TRANNSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    THIN FILM TRANNSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜传感器阵列及其制造方法

    公开(公告)号：US20150364497A1

    公开(公告)日：2015-12-17

    申请号：US14838055

    申请日：2015-08-27

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jeong Min PARK ,  Ji-Hyun KIM ,  Jung-Soo LEE ,  Sung Kyun PARK

    IPC: H01L27/12 ,  G02F1/1345 ,  G02F1/1362 ,  H01L29/786 ,  G02F1/1368

    CPC classification number: H01L27/124 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/1368 ,  H01L27/1248 ,  H01L29/78669 ,  H01L29/78678 ,  H01L33/58

    Abstract: The present disclosure provides a thin film transistor array. In an exemplary embodiment, the thin film transistor array includes: a substrate; a gate line including a gate pad and disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad; a data line including a data pad and disposed on the gate insulating layer; a first passivation layer disposed on the data line; a first electrode disposed on the first passivation layer; a second passivation layer disposed on the first electrode; and a second electrode disposed on the second passivation layer. The gate pad is exposed through a first contact hole, and the gate insulating layer, the first passivation layer, and the second passivation layer include at least a portion of the first contact hole.

    Abstract translation: 本发明提供一种薄膜晶体管阵列。 在示例性实施例中，薄膜晶体管阵列包括：基板; 栅极线，包括栅极焊盘并设置在所述衬底上; 设置在栅极线和栅极焊盘上的栅极绝缘层; 数据线，包括数据焊盘并设置在栅极绝缘层上; 设置在所述数据线上的第一钝化层; 设置在所述第一钝化层上的第一电极; 设置在所述第一电极上的第二钝化层; 以及设置在所述第二钝化层上的第二电极。 栅极焊盘通过第一接触孔露出，栅极绝缘层，第一钝化层和第二钝化层包括第一接触孔的至少一部分。

    PHOTOSENSITIVE RESIN COMPOSITION AND METHOD OF FORMING PATTERN USING THE SAME
    3.
    发明申请
    PHOTOSENSITIVE RESIN COMPOSITION AND METHOD OF FORMING PATTERN USING THE SAME 审中-公开
    光敏树脂组合物及其形成图案的方法

    公开(公告)号：US20140212809A1

    公开(公告)日：2014-07-31

    申请号：US14140350

    申请日：2013-12-24

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jeong Min PARK ,  Ji-Hyun KIM ,  Jung-Soo LEE ,  Hyoc-Min YOUN

    IPC: G03F7/038 ,  G03F7/30

    CPC classification number: G03F7/038 ,  G03F7/027 ,  G03F7/031 ,  G03F7/033 ,  G03F7/0755

    Abstract: A photosensitive resin composition includes an acryl-based copolymer formed by copolymerizing unsaturated carboxylic acid, unsaturated carboxylic acid anhydride, or a mixture thereof and an olefin-based unsaturated compound or a mixture of olefin-based unsaturated compounds, a photoinitiator represented by the following Chemical Formula 1 or 2, a multifunctional acrylate oligomer, a multifunctional monomer having an ethylenically unsaturated bond, and a melamine crosslinking agent.

    Abstract translation: 感光性树脂组合物包括通过使不饱和羧酸，不饱和羧酸酐或其混合物与烯烃系不饱和化合物或烯烃系不饱和化合物的混合物共聚形成的丙烯酸类共聚物，由以下化学式表示的光引发剂 式1或2，多官能丙烯酸酯低聚物，具有烯属不饱和键的多官能单体和三聚氰胺交联剂。

    DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME 审中-公开
    显示装置及其制造方法

    公开(公告)号：US20170047360A1

    公开(公告)日：2017-02-16

    申请号：US15340703

    申请日：2016-11-01

    Applicant: Samsung Display Co., Ltd.

    Inventor： JeongMin PARK ,  Jung-Soo LEE ,  Ji-Hyun KIM ,  SANGGAB KIM

    IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1333

    CPC classification number: H01L27/1288 ,  G02F1/1333 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/127

    Abstract: A display apparatus includes a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a gate electrode on the substrate, a common electrode insulated from the gate electrode on the substrate, a first insulating layer covering the gate electrode and the common electrode, a semiconductor pattern disposed on the first insulating layer to overlap with the gate electrode, source and drain electrodes disposed on the semiconductor pattern and spaced apart from each other, and a pixel electrode disposed on the first insulating layer to cover the drain electrode and form an electric field with the common electrode. The display apparatus may be manufactured by first to fourth photolithography processes using first to fourth masks, and the first mask may be a slit mask or a diffraction mask.

    Abstract translation: 显示装置包括基板和设置在基板上的多个像素。 每个像素包括在基板上的栅电极，与基板上的栅电极绝缘的公共电极，覆盖栅电极和公共电极的第一绝缘层，设置在第一绝缘层上以与栅电极重叠的半导体图案 设置在半导体图案上并彼此间隔开的源电极和漏电极，以及设置在第一绝缘层上以覆盖漏电极并与公共电极形成电场的像素电极。 可以通过使用第一至第四掩模的第一至第四光刻处理来制造显示装置，并且第一掩模可以是狭缝掩模或衍射掩模。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20140209915A1

    公开(公告)日：2014-07-31

    申请号：US14158133

    申请日：2014-01-17

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jeong Min PARK ,  Sung Kyun PARK ,  Jung-Soo LEE ,  Ji-Hyun KIM ,  Jun CHUN

    IPC: H01L27/12

    CPC classification number: H01L27/1248 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/13629 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/3248 ,  H01L27/3258 ,  H01L29/78606 ,  H01L2021/775

    Abstract: A thin film transistor (TFT) array panel and a manufacturing method thereof are disclosed. A contact hole may be formed to expose a pad disposed on a substrate of the TFT array panel. A first layer of a connecting member is formed with the same layer as a first field generating electrode and is disposed in the contact hole. A second passivation layer is disposed in the TFT array panel, but is removed at a region where the contact hole is formed and portions of the second passivation layer that cover the first layer of the connecting member. A second layer of the connecting member is formed on the first layer of the connecting member.

    Abstract translation: 公开了薄膜晶体管（TFT）阵列面板及其制造方法。 可以形成接触孔以暴露设置在TFT阵列面板的基板上的焊盘。 连接构件的第一层形成有与第一场产生电极相同的层，并且设置在接触孔中。 第二钝化层设置在TFT阵列面板中，但是在形成接触孔的区域处被去除并且覆盖连接构件的第一层的第二钝化层的部分。 连接构件的第二层形成在连接构件的第一层上。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    8.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20160118419A1

    公开(公告)日：2016-04-28

    申请号：US14989319

    申请日：2016-01-06

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jeong Min PARK ,  Sung Kyun PARK ,  Jung-Soo LEE ,  Ji-Hyun KIM ,  Jun CHUN

    IPC: H01L27/12

    CPC classification number: H01L27/1248 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/13629 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/3248 ,  H01L27/3258 ,  H01L29/78606 ,  H01L2021/775

    Abstract: A thin film transistor array panel includes a substrate, a gate line and a gate pad disposed on the substrate, a gate insulating layer disposed on the gate line and the gate pad, a data line and a data pad disposed on the gate insulating layer, an organic layer disposed on the data line and the data pad, and a connecting member disposed on one of the gate pad and the data pad, in which the organic layer includes a first portion overlapping the connecting member and a second portion not overlapping the connecting member, and a height of the first portion of the organic layer is greater than a height of the second portion of the organic layer.

    Abstract translation: 薄膜晶体管阵列面板包括衬底，设置在衬底上的栅极线和栅极焊盘，设置在栅极线和栅极焊盘上的栅极绝缘层，设置在栅极绝缘层上的数据线和数据焊盘， 设置在数据线和数据焊盘上的有机层和设置在栅极焊盘和数据焊盘之一上的连接部件，其中有机层包括与连接部件重叠的第一部分和不与连接部分重叠的第二部分 并且有机层的第一部分的高度大于有机层的第二部分的高度。

    THIN FILM TRANNSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    THIN FILM TRANNSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜传感器阵列及其制造方法

    公开(公告)号：US20140191256A1

    公开(公告)日：2014-07-10

    申请号：US14090487

    申请日：2013-11-26

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jeong Min PARK ,  Ji-Hyun KIM ,  Jung-Soo LEE ,  Sung Kyun PARK

    IPC: H01L33/58

    CPC classification number: H01L27/124 ,  G02F1/13458 ,  G02F1/136227 ,  G02F1/1368 ,  H01L27/1248 ,  H01L29/78669 ,  H01L29/78678 ,  H01L33/58

    Abstract: Instead of forming contact holes the same way in both the non-image forming peripheral area (PA) and the image forming display area of a thin film transistor array panel, contact holes in the DA are formed to be substantially smaller than those in the PA for thereby improving an aperture ratio of the corresponding display device. In an exemplary embodiment, an inorganic gate insulating layer is not etched in the DA and only an inorganic first passivation layer among inorganic insulating layers positioned in the DA is etched to allow communication between the drain electrode and the corresponding field generating electrode. On the other hand, in the peripheral area, plural inorganic insulating layers such as the gate insulating laver, the first passivation laver, and the second passivation layer positioned on the gate wire and the data wire are simultaneously etched to form second contact holes and third contact holes exposing respective gate pads and data pads.

    Abstract translation: 代替在非图像形成周边区域（PA）和薄膜晶体管阵列面板的图像形成显示区域中以相同的方式形成接触孔，DA中的接触孔形成为显着小于PA中的接触孔 从而提高对应的显示装置的开口率。 在一个示例性实施例中，在DA中不蚀刻无机栅极绝缘层，并且仅在位于DA中的无机绝缘层中只有无机第一钝化层被蚀刻以允许漏电极和相应的场产生电极之间的连通。 另一方面，在外围区域中，同时蚀刻位于栅极线和数据线上的多个无机绝缘层，例如栅极绝缘层，第一钝化层和第二钝化层，形成第二接触孔，第三接触孔 接触孔暴露各个栅极焊盘和数据焊盘。

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