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公开(公告)号：US10364946B1
公开(公告)日：2019-07-30
申请号：US15895253
申请日：2018-02-13
发明人： Guido Marco Bertoni , Massimo Ratti
IPC分类号： F21K9/64 , F21K9/232 , F21K9/235 , F21K9/237 , F21K9/238 , F21V14/04 , G08C17/02 , H05B37/02 , F21Y115/30
CPC分类号： F21K9/64 , F21K9/232 , F21K9/235 , F21K9/237 , F21K9/238 , F21V14/04 , F21Y2115/30 , G08C17/02 , G08C2201/93 , H05B37/0218 , H05B37/0227 , H05B37/0272
摘要： Disclosed herein is a lighting system including a bulb. The bulb includes a phosphor plate, and a scanning projector to emit a beam of collimated light and scan the beam of collimated light across the phosphor plate to thereby cause emission of light by portions of the phosphor plate impinged upon by the beam of collimated light. Control circuitry wirelessly receives configuration data and modulates the beam of collimated light during scanning so that the scanning forms a projection pattern on the phosphor plate. A control system is spaced apart from the bulb and processes the initial configuration data, and wirelessly sends the configuration data to the control circuitry of the bulb. A mobile wireless communications device wirelessly sends initial configuration data to the control system.
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公开(公告)号：US11582039B2
公开(公告)日：2023-02-14
申请号：US17129688
申请日：2020-12-21
摘要： A method performs cryptographic operations on data in a processing device. An iterative operation between a first operand formed by a given number of words and a second operand using a secret key is performed. The iterative operation includes, for each bit of the secret key, applying one of a first set operations and a second set of operations to the first operand and to the second operand depending on of the bit, and conditionally swapping words of the first and the second operand based on a control bit value obtained by applying a logic XOR function to a random bit.
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公开(公告)号：US11057194B2
公开(公告)日：2021-07-06
申请号：US16022033
申请日：2018-06-28
摘要： A processing system includes a first processing unit; a second processing unit; and a cryptographic coprocessor communicatively coupled to the first processing unit and the second processing unit. The cryptographic coprocessor includes a key storage memory for storing a cryptographic key; a first interface configured to receive source data to be processed directly from the first processing unit; a hardware cryptographic engine configured to process the source data as a function of the cryptographic key stored in the key storage memory; a second interface configured to receive a first cryptographic key directly from the second processing unit; and a hardware key management circuit configured to store the first cryptographic key in the key storage memory.
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4.发明授权公开(公告)号：US09152383B2
公开(公告)日：2015-10-06
申请号：US13669213
申请日：2012-11-05
CPC分类号： G06F7/728 , G06F2207/7238 , H04L9/3006 , H04L9/302
摘要： An embodiment concerns a method for encrypting a message through a cryptographic algorithm including a computation of a mathematical function including the computation of one or more modular multiplications. Such a cryptographic algorithm has a respective module. The method, carried out with an electronic device, includes: providing a first parameter; generating a random number; calculating a Montgomery parameter based on said first parameter and on a integer multiple of said random number; generating a representation of the message to be encrypted in a Montgomery domain through a Montgomery conversion function applied to the message and to the Montgomery parameter; carrying out the calculation of the mathematical function on the message represented in the Montgomery domain.
摘要翻译： 实施例涉及通过密码算法加密消息的方法，包括计算包括一个或多个模乘法的计算的数学函数。 这样的密码算法具有相应的模块。 该方法用电子设备进行，包括：提供第一参数; 产生随机数; 基于所述第一参数和所述随机数的整数倍计算蒙哥马利参数; 通过应用于消息的蒙哥马利转换功能和蒙哥马利参数生成要在蒙哥马利域加密的消息的表示; 对Montgomery域中表示的消息进行数学函数的计算。
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公开(公告)号：US11502836B2
公开(公告)日：2022-11-15
申请号：US17149623
申请日：2021-01-14
摘要： A scalar multiplication operation includes an iterative procedure performing a set of operations at each iteration on a bit or on a group of consecutive bits of a secret key. The multiplication operation includes multiplying values of projective format coordinates by a random value. The random value is a product of a random number generated over a range having as end value a first value, with a second value, which is larger than said first value. The first value is a power of two of a word size multiplied by a multiplier value, minus one. The second value is equal to a power of two of a number of bits of the coordinates divided by the first value. The multiplier value is an integer greater than or equal to one and smaller than a ratio of said number of bits to the word size.
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公开(公告)号：US11032067B2
公开(公告)日：2021-06-08
申请号：US16022110
申请日：2018-06-28
摘要： A hardware secure module includes a processing unit and a cryptographic coprocessor. The cryptographic coprocessor includes a key storage memory; a hardware key management circuit configured to store a first cryptographic key in the key storage memory; a first interface configured to receive source data to be processed; a second interface configured to receive the first cryptographic key from the processing unit for storing in the key storage memory; a hardware cryptographic engine configured to process the source data as a function of the first cryptographic key stored in the key storage memory; and a third interface configured to receive a second cryptographic key. The hardware secure module further includes a non-volatile memory configured to store the second cryptographic key; and a hardware configuration module configured to read the second cryptographic key from the non-volatile memory and send the second cryptographic key to the third interface.
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公开(公告)号：US20190007201A1
公开(公告)日：2019-01-03
申请号：US16022033
申请日：2018-06-28
摘要： A processing system includes a first processing unit; a second processing unit; and a cryptographic coprocessor communicatively coupled to the first processing unit and the second processing unit. The cryptographic coprocessor includes a key storage memory for storing a cryptographic key; a first interface configured to receive source data to be processed directly from the first processing unit; a hardware cryptographic engine configured to process the source data as a function of the cryptographic key stored in the key storage memory; a second interface configured to receive a first cryptographic key directly from the second processing unit; and a hardware key management circuit configured to store the first cryptographic key in the key storage memory.
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公开(公告)号：US20190249832A1
公开(公告)日：2019-08-15
申请号：US15895253
申请日：2018-02-13
发明人： Guido Marco Bertoni , Massimo Ratti
IPC分类号： F21K9/64 , G08C17/02 , F21K9/235 , F21K9/237 , F21V14/04 , F21K9/232 , F21K9/238 , H05B37/02
CPC分类号： F21K9/64 , F21K9/232 , F21K9/235 , F21K9/237 , F21K9/238 , F21V14/04 , F21Y2115/30 , G08C17/02 , G08C2201/93 , H05B37/0218 , H05B37/0227 , H05B37/0272
摘要： Disclosed herein is a lighting system including a bulb. The bulb includes a phosphor plate, and a scanning projector to emit a beam of collimated light and scan the beam of collimated light across the phosphor plate to thereby cause emission of light by portions of the phosphor plate impinged upon by the beam of collimated light. Control circuitry wirelessly receives configuration data and modulates the beam of collimated light during scanning so that the scanning forms a projection pattern on the phosphor plate. A control system is spaced apart from the bulb and processes the initial configuration data, and wirelessly sends the configuration data to the control circuitry of the bulb. A mobile wireless communications device wirelessly sends initial configuration data to the control system.
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9.发明申请公开(公告)号：US20190007202A1
公开(公告)日：2019-01-03
申请号：US16022110
申请日：2018-06-28
摘要： A hardware secure module includes a processing unit and a cryptographic coprocessor. The cryptographic coprocessor includes a key storage memory; a hardware key management circuit configured to store a first cryptographic key in the key storage memory; a first interface configured to receive source data to be processed; a second interface configured to receive the first cryptographic key from the processing unit for storing in the key storage memory; a hardware cryptographic engine configured to process the source data as a function of the first cryptographic key stored in the key storage memory; and a third interface configured to receive a second cryptographic key. The hardware secure module further includes a non-volatile memory configured to store the second cryptographic key; and a hardware configuration module configured to read the second cryptographic key from the non-volatile memory and send the second cryptographic key to the third interface.
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公开(公告)号：US08963715B2
公开(公告)日：2015-02-24
申请号：US13840666
申请日：2013-03-15
发明人： Guido Marco Bertoni , Fabio Tota
IPC分类号： G08B13/14
CPC分类号： G08B13/02 , G06F21/86 , H05K5/0208
摘要： An embodiment of an apparatus has a closed housing accommodating an element to be protected, and a pressure sensor coupled to a control unit configured to detect pressure variations within the housing upon opening the housing. The control unit is configured to activate countermeasures upon detecting opening of the housing. For example, the apparatus may be a set-top box, a cell phone, a television set, a printer ink cartridge of toner cartridge, or a meter, wherein the element to be protected is a semiconductor chip and relevant couplings, storing an enabling code or key.
摘要翻译： 装置的实施例具有容纳要保护的元件的封闭壳体，以及联接到控制单元的压力传感器，其配置成在打开壳体时检测壳体内的压力变化。 控制单元被配置为在检测到壳体的开口时激活对策。 例如，该装置可以是机顶盒，手机，电视机，调色剂盒的打印机墨盒或仪表，其中待保护的元件是半导体芯片和相关的耦合，存储启用 代码或密钥。
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