公开(公告)号：US11451130B2

公开(公告)日：2022-09-20

申请号：US17229554

申请日：2021-04-13

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Fabrizio Bognanni ,  Giovanni Caggegi ,  Giuseppe Cantone ,  Vincenzo Marano ,  Francesco Pulvirenti

IPC: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/687

Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.

公开(公告)号：US11881759B2

公开(公告)日：2024-01-23

申请号：US17888001

申请日：2022-08-15

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Fabrizio Bognanni ,  Giovanni Caggegi ,  Giuseppe Cantone ,  Vincenzo Marano ,  Francesco Pulvirenti

IPC: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/687

CPC classification number: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/6872 ,  H03K2217/0081

Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.

公开(公告)号：US11791815B2

公开(公告)日：2023-10-17

申请号：US17959785

申请日：2022-10-04

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Giovanni Fontana ,  Marco Riva ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H03K5/151 ,  H03K17/16 ,  H03K17/687 ,  H03K17/06 ,  H03K17/0812

CPC classification number: H03K17/063 ,  H03K17/08122 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

公开(公告)号：US20220006450A1

公开(公告)日：2022-01-06

申请号：US17355055

申请日：2021-06-22

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Giovanni Fontana ,  Marco Riva ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H03K17/06 ,  H03K17/0812

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

公开(公告)号：US20180102922A1

公开(公告)日：2018-04-12

申请号：US15601299

申请日：2017-05-22

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro Nizza ,  Roberto Aletti ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H04L25/02 ,  H04B1/58 ,  H04B1/16 ,  H04B1/38 ,  H04L25/08 ,  H04B3/46 ,  H04B3/56

CPC classification number: H04L25/0266 ,  H04B1/1607 ,  H04B1/38 ,  H04B1/581 ,  H04B3/04 ,  H04B3/46 ,  H04B3/56 ,  H04B2001/0425 ,  H04L25/085

Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n−1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.

公开(公告)号：US20170141775A1

公开(公告)日：2017-05-18

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.

公开(公告)号：US10110399B2

公开(公告)日：2018-10-23

申请号：US15601299

申请日：2017-05-22

Applicant: STMicroelectronics S.r.l.

Inventor： Alessandro Nizza ,  Roberto Aletti ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H04L25/02 ,  H04B1/58 ,  H04B1/16 ,  H04B1/38 ,  H04L25/08 ,  H04B3/46 ,  H04B3/56

Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n−1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.

公开(公告)号：US20230040189A1

公开(公告)日：2023-02-09

申请号：US17959785

申请日：2022-10-04

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Giovanni Fontana ,  Marco Riva ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H03K17/06 ,  H03K17/0812

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

公开(公告)号：US11476845B2

公开(公告)日：2022-10-18

申请号：US17355055

申请日：2021-06-22

Applicant: STMicroelectronics S.r.l.

Inventor： Marco Giovanni Fontana ,  Marco Riva ,  Francesco Pulvirenti ,  Giuseppe Cantone

IPC: H03K5/151 ,  H03K17/16 ,  H03K17/687 ,  H03K17/06 ,  H03K17/0812

Abstract: A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

公开(公告)号：US10084446B2

公开(公告)日：2018-09-25

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24 ,  H03K17/0412 ,  H03K17/06 ,  H03K17/74

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.