公开(公告)号：US11451130B2

公开(公告)日：2022-09-20

申请号：US17229554

申请日：2021-04-13

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Fabrizio Bognanni ,  Giovanni Caggegi ,  Giuseppe Cantone ,  Vincenzo Marano ,  Francesco Pulvirenti

IPC: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/687

Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.

公开(公告)号：US20170141775A1

公开(公告)日：2017-05-18

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.

公开(公告)号：US11881759B2

公开(公告)日：2024-01-23

申请号：US17888001

申请日：2022-08-15

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Fabrizio Bognanni ,  Giovanni Caggegi ,  Giuseppe Cantone ,  Vincenzo Marano ,  Francesco Pulvirenti

IPC: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/687

CPC classification number: H02M1/08 ,  H02M3/07 ,  H02M3/158 ,  H03K17/6872 ,  H03K2217/0081

Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.

公开(公告)号：US10084446B2

公开(公告)日：2018-09-25

申请号：US15163142

申请日：2016-05-24

Applicant: STMicroelectronics S.R.L.

Inventor： Giovanni Caggegi ,  Francesco Pulvirenti ,  Giuseppe Cantone ,  Vincenzo Palumbo

IPC: H03K17/687 ,  H01L29/78 ,  H03K5/24 ,  H03K17/0412 ,  H03K17/06 ,  H03K17/74

CPC classification number: H03K17/687 ,  H01L29/7816 ,  H03K5/24 ,  H03K17/04123 ,  H03K17/063 ,  H03K17/74 ,  H03K2017/066

Abstract: A circuit provides a high-voltage low-drop diode-like conductive path between a DC voltage supply terminal and a bootstrap terminal in charging a supply capacitor for driving a power switch with the capacitor set between the bootstrap terminal and an output terminal alternatively switchable between a low voltage and a high voltage DC voltage. In an embodiment, the circuit includes first and second transistors such as LDMOS depletion transistors with the first transistor set in a cascode arrangement between the bootstrap terminal and the DC voltage supply terminal and the second transistor coupled with a sense comparator for comparing the voltage at the bootstrap terminal with the voltage at said DC voltage supply terminal. The first and second transistors have common control terminals coupled with the DC voltage supply terminal and common coupling terminals to the bootstrap terminal.