Abstract:
Provided is an arithmetic operation device including a plurality of shift registers each constituted by first to (N+1)th registers and a control unit configured to cause the shift registers to move stored values. The control unit causes the stored values to be output from a predetermined pair of registers constituting the first shift register while causing the stored values to move so that all combinations of a pair of stored values selectable from the stored values are output, and causes the stored values to be output from a predetermined pair of registers constituting the other shift register while causing the stored values to move.
Abstract:
An authentication device includes circuitry that holds L (L≧2) secret keys si (i=1 to L) and L public keys yi that satisfy yi=F(si) with respect to a set F of multivariate polynomials of n-th order (n≧2). The circuitry also performs with a verifier, an interactive protocol for proving knowledge of (L−1) secret keys si that satisfy yi=F(si). The circuitry receives L challenges from the verifier, arbitrarily selects (L−1) challenges from the L challenges received. The circuitry also generates, by using the secret keys si, (L−1) responses respectively for the (L−1) challenges selected, and transmits the (L−1) responses generated.
Abstract:
Provided is an authentication device including a key setting unit for setting sεKn to a secret key and setting a multi-order polynomial fi(xl, . . . , xn) (i=1 to m) on a ring K and yi=fi(s) to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k≧3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit, where the response information is information that enables calculation of the secret key s in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
Abstract:
There is provided a print medium, whereon a public key used for authentication in a public-key authentication scheme is displayed as character information.
Abstract:
An information processing apparatus including a memory and one or more processors coupled to the memory and configured to transmit commitment information, including identification information of a verification processing apparatus, to the verification processing apparatus, receive first challenge information from the verification processing apparatus, generate second challenge information including the identification information based on the received first challenge information, generate response information, used for the verification processing apparatus to execute a process related to verification of the information processing apparatus, based on the generated second challenge information, and transmit the response information to the verification processing apparatus.
Abstract:
There is provided an information processing apparatus including a key selection section configured to select one out of a plurality of different secret keys, in a public key authentication scheme or a digital signature scheme in which each of the plurality of secret keys exists for one public key registered in a verifier, and a process execution section configured to execute, by using the secret key selected by the key selection section, an authentication process with the verifier by the public key authentication scheme or a digital signature generation process to the verifier by the digital signature scheme.
Abstract:
There is provided a print medium, whereon a public key used for authentication in a public-key authentication scheme is displayed as character information.
Abstract:
Provided is an arithmetic operation device including a plurality of shift registers each constituted by first to (N+1)th registers and a control unit configured to cause the shift registers to move stored values. The control unit causes the stored values to be output from a predetermined pair of registers constituting the first shift register while causing the stored values to move so that all combinations of a pair of stored values selectable from the stored values are output, and causes the stored values to be output from a predetermined pair of registers constituting the other shift register while causing the stored values to move.
Abstract:
There is provided an encryption device that is secure against a side channel attack, and can suppress a processing load. The encryption device includes a data encryption part in which at least part of a plurality of round functions for successively performing encryption processing on an input value is tabulated to be encrypted using a white-box model in which input/output values of the round function is able to be recognized from the outside. Each of the round functions includes a tabulated encryption function for encrypting an input value using a black-box model in which the input/output values are able to be recognized from the outside and an intermediate value is not able to be recognized from the outside, and the encryption function is updated with a random number.
Abstract:
There is provided an encryption device to suppress calculation in the reverse direction in whitebox model encryption. The encryption device includes: having a predetermined relationship that outputs a plurality of output values according to a plurality of input values configured of plain text, with a part of the plurality of output values being inputted to a trapdoor one-way function, the predetermined relationship being defined by the output values that are not inputted to the trapdoor one-way function and one arbitrary input value of the plurality of input values; and having a property of encrypting a part of the plurality of output values according to the trapdoor one-way function, and the trapdoor one-way function not being able to decrypt encrypted data in a state in which a trapdoor is unknown.