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公开(公告)号:US11244960B2
公开(公告)日:2022-02-08
申请号:US16888057
申请日:2020-05-29
申请人: SK hynix Inc.
发明人: Kun Young Lee , Sun Young Kim , Jae Gil Lee
IPC分类号: H01L27/11597 , H01L27/1159
摘要: The present technology includes a semiconductor memory device. The semiconductor memory device includes a stack including a conductive pattern and an insulating pattern, a channel structure penetrating the stack, and a memory pattern between the conductive pattern and the channel structure. The memory pattern includes a blocking pattern, a tunnel pattern, a storage pattern, and a ferroelectric pattern.
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公开(公告)号:US10957534B2
公开(公告)日:2021-03-23
申请号:US16657649
申请日:2019-10-18
申请人: SK hynix Inc.
发明人: Sun Young Kim , Nam Jae Lee
摘要: A method of manufacturing a semiconductor device includes forming a first sacrificial layer including a nitride over a first source layer, forming a second sacrificial layer including aluminum oxide over the first sacrificial layer, forming a second source layer over the second sacrificial layer, forming a stacked structure over the second source layer, forming a channel layer that passes through the stacked structure, the second source layer, the second sacrificial layer, and the first sacrificial layer, the channel layer being enclosed by a memory layer, forming a slit that passes through the stacked structure and the second source layer, forming a polysilicon spacer in the slit, forming an opening by removing the first sacrificial layer and the second sacrificial layer, exposing the channel layer by etching the memory layer, and forming a third source layer in the opening.
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公开(公告)号:US12048160B2
公开(公告)日:2024-07-23
申请号:US18186062
申请日:2023-03-17
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H10B43/27 , H01L21/28 , H01L29/423 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/00 , H10N70/00 , H10N70/20
CPC分类号: H10B43/27 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/845 , H10N70/066 , H10N70/231
摘要: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, wherein the insulating patterns protrude farther towards the channel structure than a sidewall of the hard mask pattern, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns.
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公开(公告)号:US11659715B2
公开(公告)日:2023-05-23
申请号:US17561471
申请日:2021-12-23
申请人: SK hynix Inc.
发明人: Kun Young Lee , Sun Young Kim , Jae Gil Lee
IPC分类号: H01L27/11597 , H01L27/1159
CPC分类号: H01L27/11597 , H01L27/1159
摘要: The present technology includes a semiconductor memory device. The semiconductor memory device includes a stack including a conductive pattern and an insulating pattern, a channel structure penetrating the stack, and a memory pattern between the conductive pattern and the channel structure. The memory pattern includes a blocking pattern, a tunnel pattern, a storage pattern, and a ferroelectric pattern.
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公开(公告)号:US11437399B2
公开(公告)日:2022-09-06
申请号:US16992889
申请日:2020-08-13
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H01L27/11582 , H01L27/24 , H01L27/11556
摘要: A semiconductor device includes a stacked structure including insulating layers and conductive layers alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure passing through the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure and each including a first surface and a second surface, wherein the first surface faces each of the insulating layers and is flat and the second surface faces the channel structure and includes a curved surface, and a memory layer interposed between the stacked structure and the channel structure and filling a space between the insulating patterns, wherein a sidewall of each of the conductive layers is located on an extending line of a sidewall of the hard mask pattern and the insulating patterns protrude farther towards the channel structure than the sidewall of the hard mask pattern.
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公开(公告)号:US12075623B2
公开(公告)日:2024-08-27
申请号:US18186062
申请日:2023-03-17
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H10B43/27 , H01L21/28 , H01L29/423 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/00 , H10N70/00 , H10N70/20
CPC分类号: H10B43/27 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/845 , H10N70/066 , H10N70/231
摘要: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, wherein the insulating patterns protrude farther towards the channel structure than a sidewall of the hard mask pattern, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns.
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公开(公告)号:US11778829B2
公开(公告)日:2023-10-03
申请号:US17857699
申请日:2022-07-05
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H01L27/11582 , H01L27/11556 , H01L27/24 , H01L27/1157 , H01L27/11524 , H01L45/00 , H01L29/423 , H01L21/28 , H10B43/27 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/00 , H10N70/00 , H10N70/20
CPC分类号: H10B43/27 , H01L29/40114 , H01L29/40117 , H01L29/4234 , H01L29/42324 , H10B41/27 , H10B41/35 , H10B43/35 , H10B63/845 , H10N70/066 , H10N70/231
摘要: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns, wherein a sidewall of each of the conductive layers protrudes farther towards the channel structure than a sidewall of the hard mask pattern, and wherein the insulating patterns protrude farther towards the channel structure than the sidewall of each of the conductive layers.
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公开(公告)号:US11637124B2
公开(公告)日:2023-04-25
申请号:US16992926
申请日:2020-08-13
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H01L29/423 , H01L27/11582 , H01L27/11556 , H01L27/24 , H01L27/1157 , H01L27/11524 , H01L45/00 , H01L21/28
摘要: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, wherein the insulating patterns protrude farther towards the channel structure than a sidewall of the hard mask pattern, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns.
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公开(公告)号:US11430810B2
公开(公告)日:2022-08-30
申请号:US16992960
申请日:2020-08-13
申请人: SK hynix Inc.
发明人: Changhan Kim , In Ku Kang , Sun Young Kim
IPC分类号: H01L27/11582 , H01L27/11556 , H01L27/24 , H01L27/1157 , H01L27/11524 , H01L29/423 , H01L45/00 , H01L21/28
摘要: A semiconductor device includes a stacked structure with insulating layers and conductive layers that are alternately stacked on each other, a hard mask pattern located on the stacked structure, a channel structure penetrating the hard mask pattern and the stacked structure, insulating patterns interposed between the insulating layers and the channel structure, and a memory layer interposed between the stacked structure and the channel structure, wherein the memory layer fills a space between the insulating patterns, wherein a sidewall of each of the conductive layers protrudes farther towards the channel structure than a sidewall of the hard mask pattern, and wherein the insulating patterns protrude farther towards the channel structure than the sidewall of each of the conductive layers.
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