公开(公告)号：US20250081424A1

公开(公告)日：2025-03-06

申请号：US18816312

申请日：2024-08-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tsutomu MURAKAWA ,  Hiromi SAWAI ,  Motomu KURATA ,  Sachiaki TEZUKA ,  Jun YAMADA ,  Shunpei YAMAZAKI

IPC: H10B12/00

Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes first and second transistors. The first transistor includes a semiconductor layer, a pair of first conductive layers, and a pair of second conductive layers over the pair of first conductive layers. The pair of first conductive layers and the pair of second conductive layers function as a source electrode and a drain electrode of the first transistor. A third conductive layer functioning as a gate electrode of the second transistor is in contact with one of the pair of first conductive layers. In a cross-sectional view of the first transistor in the channel width direction, the height of the semiconductor layer is larger than the width of the semiconductor layer. The semiconductor device can include a capacitor, in which the third conductive layer also functions as one of a pair of electrodes.

公开(公告)号：US20250015193A1

公开(公告)日：2025-01-09

申请号：US18748238

申请日：2024-06-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Fumito ISAKA ,  Yuichi SATO ,  Toshikazu OHNO ,  Hitoshi KUNITAKE ,  Tsutomu MURAKAWA

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H10B12/00 ,  H10K59/121

Abstract: Provided are a transistor with favorable electrical characteristics, a transistor with a high on-state current, a transistor with low parasitic capacitance, or a transistor, a semiconductor device, or a memory device which can be miniaturized or highly integrated. An oxide semiconductor layer included in the transistor, the semiconductor device, or the memory device includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a surface on which the oxide semiconductor layer is to be formed to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron 10 microscope, bright spots arranged in a layered manner in a direction parallel to the surface are observed in each of the first region, the second region, and the third region.

公开(公告)号：US20250015089A1

公开(公告)日：2025-01-09

申请号：US18712398

申请日：2022-11-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hitoshi KUNITAKE ,  Ryota HODO ,  Tsutomu MURAKAWA

IPC: H01L27/12

Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator, a first metal oxide, a first conductor, a second conductor, and a third conductor. The first metal oxide includes a first depressed portion, a second depressed portion, and a third depressed portion positioned between the first depressed portion and the second depressed portion. The first conductor is provided to fill the first depressed portion, and the second conductor is provided to fill the second depressed portion. A top surface of the first conductor and a top surface of the second conductor are level with or substantially level with a top surface of the first metal oxide. The first insulator is provided inside the third depressed portion. The third conductor is provided over the first insulator and includes a region overlapping with the first metal oxide with the first insulator therebetween.

公开(公告)号：US20230262952A1

公开(公告)日：2023-08-17

申请号：US18015118

申请日：2021-08-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Motomu KURATA ,  Tsutomu MURAKAWA ,  Ryo ARASAWA ,  Kunihiro FUKUSHIMA ,  Yasumasa YAMANE ,  Shinya SASAGAWA

IPC: H10B12/00

CPC classification number: H10B12/01

Abstract: A semiconductor device with a small variation in transistor characteristics can be provided. A step of forming an opening in a structure body including an oxide semiconductor device to reach the oxide semiconductor device, a step of embedding a first conductor in the opening, a step of forming a second conductor in contact with a top surface of the first conductor, a step of forming a first barrier insulating film by a sputtering method to cover the structure body, the first conductor, and the second conductor, and a step of forming a second barrier insulating film over the first barrier insulating film by an ALD method are included. The first barrier insulating film and the second barrier insulating film each have a function of inhibiting hydrogen diffusion.

公开(公告)号：US20220157992A1

公开(公告)日：2022-05-19

申请号：US17432123

申请日：2020-02-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuichi YANAGISAWA ,  Hisao IKEDA ,  Tsutomu MURAKAWA

IPC: H01L29/786 ,  H01L29/417

Abstract: A semiconductor device with high productivity is provided. The semiconductor device includes a first and a second transistor and a first and a second capacitor. The first and the second transistor include gate electrodes and back gate electrodes. The second transistor is provided in a layer above the first transistor, and the second capacitor is provided in a layer above the first capacitor. One electrode of the first capacitor is electrically connected to one of a source electrode and a drain electrode of the first transistor and electrically connected to one of a source electrode and a drain electrode of the second transistor. The other electrode of the first capacitor is formed in the same layer as the back gate electrode of the second transistor.

公开(公告)号：US20180286886A1

公开(公告)日：2018-10-04

申请号：US15925122

申请日：2018-03-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime KIMURA ,  Tsutomu MURAKAWA ,  Kosei NEI ,  Hiroaki HONDA ,  Yusuke SHINO

IPC: H01L27/12 ,  G11C11/404 ,  H01L29/786 ,  H01L27/06 ,  H01L21/84

Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.

公开(公告)号：US20250081537A1

公开(公告)日：2025-03-06

申请号：US18950834

申请日：2024-11-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Shinya SASAGAWA ,  Katsuaki TOCHIBAYASHI ,  Tsutomu MURAKAWA ,  Erika TAKAHASHI

IPC: H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/66 ,  H10B12/00

Abstract: A semiconductor device in which a variation of transistor characteristics is small is provided. The semiconductor device includes a transistor. The transistor includes a first insulator, a first oxide over the first insulator, a first conductor, a second conductor, and a second oxide, which is positioned between the first conductor and the second conductor, over the first oxide, a second insulator over the second oxide, and a third conductor over the second insulator. A top surface of the first oxide in a region overlapping with the third conductor is at a lower position than a position of a top surface of the first oxide in a region overlapping with the first conductor. The first oxide in the region overlapping with the third conductor has a curved surface between a side surface and the top surface of the first oxide, and the curvature radius of the curved surface is greater than or equal to 1 nm and less than or equal to 15 nm.

公开(公告)号：US20240006539A1

公开(公告)日：2024-01-04

申请号：US18368782

申请日：2023-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiromi SAWAI ,  Ryo TOKUMARU ,  Toshihiko TAKEUCHI ,  Tsutomu MURAKAWA ,  Sho NAGAMATSU ,  Tomoaki MORIWAKA

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/06 ,  H01L29/66 ,  H10B12/00

CPC classification number: H01L29/7869 ,  H01L29/04 ,  H01L29/0665 ,  H01L29/66742 ,  H10B12/05 ,  H10B12/315

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a conductor, a first insulator in contact with a side surface of the conductor, a second insulator in contact with a top surface of the conductor and a top surface of the first insulator, and an oxide over the second insulator. The oxide includes a region that overlaps with the conductor with the second insulator interposed therebetween. The maximum height of a roughness curve (Rz) of the top surface of the conductor is 6.0 nm or smaller. The region includes crystals, and c-axes of the crystals are aligned in the normal direction of the top surface of the conductor.

公开(公告)号：US20200273886A1

公开(公告)日：2020-08-27

申请号：US16816423

申请日：2020-03-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime KIMURA ,  Tsutomu MURAKAWA ,  Kosei NEI ,  Hiroaki HONDA ,  Yusuke SHINO

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/84

Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.

公开(公告)号：US20180006124A1

公开(公告)日：2018-01-04

申请号：US15628945

申请日：2017-06-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tsutomu MURAKAWA ,  Toshihiko TAKEUCHI ,  Hiroki KOMAGATA ,  Hiromi SAWAI ,  Yasumasa YAMANE ,  Shota SAMBONSUGE ,  Kazuya SUGIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/24 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/24 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H01L29/7881

Abstract: A semiconductor device includes a first conductor; a first insulator thereover; a first oxide thereover; a second oxide thereover; a second conductor and a third conductor that are separate from each other thereover; a third oxide over the first insulator, the second oxide, the second conductor, and the third conductor; a second insulator thereover; a fourth conductor thereover; and a third insulator over the first insulator, the second insulator, and the fourth conductor. The second oxide includes a region where the energy of the conduction band minimum of an energy band is low and a region where the energy of the conduction band minimum of the energy band is high. The energy of the conduction band minimum of the third oxide is higher than that of the region of the second oxide where the energy of the conduction band minimum is low. Side surfaces of the first oxide and the second oxide are covered with the third oxide.