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公开(公告)号：US20140151788A1
公开(公告)日：2014-06-05
申请号：US14177140
申请日：2014-02-10
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L21/26506 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/4933 , H01L29/66727 , H01L29/66734
摘要： In one embodiment, a structure for a trench power field effect transistor device with controlled, shallow, abrupt, body contact regions.
摘要翻译： 在一个实施例中，具有受控的，浅的，突然的身体接触区域的沟槽功率场效应晶体管器件的结构。
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2.发明授权公开(公告)号：US10276556B2
公开(公告)日：2019-04-30
申请号：US16004718
申请日：2018-06-11
IPC分类号： H01L29/06 , H01L27/02 , H01L21/76 , H01L23/535 , H01L29/36 , H01L29/66 , H01L29/739 , H01L21/762 , H01L21/265
摘要： A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major surface, and a semiconductor region disposed between the floating buried doped region and a second major surface. Trench isolation portions extend from the first major surface and terminate within the semiconductor region to define an active region. An insulated trench structure is laterally disposed between the trench isolation portions, terminates within the floating buried doped region, and defines a first portion and a second portion of the active region. A biasing semiconductor device is within the first portion, and a functional semiconductor device is within the second portion. The biasing semiconductor device is adapted to set a potential of the floating buried doped region and adapted to divert parasitic currents away from the functional semiconductor device.
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公开(公告)号：US09368615B2
公开(公告)日：2016-06-14
申请号：US14177140
申请日：2014-02-10
IPC分类号： H01L29/76 , H01L29/78 , H01L29/66 , H01L29/10 , H01L21/265 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/49
CPC分类号： H01L29/7813 , H01L21/26506 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/42368 , H01L29/4933 , H01L29/66727 , H01L29/66734
摘要： In one embodiment, a structure for a trench power field effect transistor device with controlled, shallow, abrupt, body contact regions.
摘要翻译： 在一个实施例中，具有受控的，浅的，突然的身体接触区域的沟槽功率场效应晶体管器件的结构。
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4.发明授权公开(公告)号：US10818516B2
公开(公告)日：2020-10-27
申请号：US16353551
申请日：2019-03-14
IPC分类号： H01L21/48 , H01L29/06 , H01L29/36 , H01L29/66 , H01L29/739 , H01L21/762 , H01L21/265 , H01L29/10 , H01L21/761 , H01L27/02 , H01L23/31 , H01L23/498 , H01L23/00
摘要： A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major surface, and a semiconductor region disposed between the floating buried doped region and a second major surface. Trench isolation portions extend from the first major surface and terminate within the semiconductor region to define an active region. An insulated trench structure is laterally disposed between the trench isolation portions, terminates within the floating buried doped region, and defines a first portion and a second portion of the active region. A biasing semiconductor device is within the first portion, and a functional semiconductor device is within the second portion. The biasing semiconductor device is adapted to set a potential of the floating buried doped region and adapted to divert parasitic currents away from the functional semiconductor device.
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5.发明授权公开(公告)号：US10026728B1
公开(公告)日：2018-07-17
申请号：US15497443
申请日：2017-04-26
IPC分类号： H01L29/06 , H01L21/76 , H01L27/02 , H01L23/535 , H01L29/36 , H01L29/66 , H01L29/739 , H01L21/762 , H01L21/265
摘要： A semiconductor device includes a floating buried doped region, a first doped region disposed between the floating buried doped region and a first major surface, and a semiconductor region disposed between the floating buried doped region and a second major surface. Trench isolation portions extend from the first major surface and terminate within the semiconductor region to define an active region. An insulated trench structure is laterally disposed between the trench isolation portions, terminates within the floating buried doped region, and defines a first portion and a second portion of the active region. A biasing semiconductor device is within the first portion, and a functional semiconductor device is within the second portion. The biasing semiconductor device is adapted to set a potential of the floating buried doped region and adapted to divert parasitic currents away from the functional semiconductor device.
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