公开(公告)号：US10430328B2

公开(公告)日：2019-10-01

申请号：US14487905

申请日：2014-09-16

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Miki Sapir ,  Amir Shaharabany ,  Hadas Oshinsky ,  Rafi Abraham ,  Elad Baram

IPC: G06F3/06 ,  G06F11/14 ,  G06F12/00 ,  G06F17/30 ,  G06F12/02 ,  G06F12/0871

Abstract: Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.

公开(公告)号：US09880783B2

公开(公告)日：2018-01-30

申请号：US14925619

申请日：2015-10-28

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Alon Marcu ,  Nir Perry ,  Miki Sapir ,  Hadas Oshinsky ,  Julian Vlaiko

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0611 ,  G06F3/0685 ,  G06F3/0688

Abstract: Systems and methods for managing transfer of data into and out of a host data buffer of a host are disclosed. In one implementation, a partial write completion module of a storage system retrieves from the host, stores in a memory, and acknowledges retrieving and storing with a partial write completion message, each subset of a larger set of data associated with a host write command. The host may utilize received partial write completion messages to release and use the portion of the host data buffer that had been storing the subset identified in the message rather than waiting to release data associated with the host write command until all the data associated with the command is stored in the memory. The memory in which each subset is stored may be non-volatile memory in the storage device or a shadow buffer on the host or an external memory device.

公开(公告)号：US20160077968A1

公开(公告)日：2016-03-17

申请号：US14487905

申请日：2014-09-16

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Miki Sapir ,  Amir Shaharabany ,  Hadas Oshinsky ,  Rafi Abraham ,  Elad Baram

IPC: G06F12/08

CPC classification number: G06F12/0246 ,  G06F12/0871 ,  G06F2212/1016 ,  G06F2212/1036 ,  G06F2212/214 ,  G06F2212/222 ,  G06F2212/284 ,  G06F2212/313 ,  G06F2212/601 ,  G06F2212/7203 ,  G06F2212/7204 ,  G06F2212/7205 ,  G06F2212/7206 ,  G06F2212/7208 ,  G11C2211/5641

Abstract: Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.

Abstract translation: 公开了用于配置，控制和操作非易失性高速缓存的系统和方法。 主机系统可以轮询存储器系统关于其非易失性高速缓存的存储器系统的配置。 此外，主机系统可以配置存储器系统上的非易失性高速缓存，例如非易失性高速缓存的大小和非易失性高速缓存的编程类型（例如，非易失性高速缓存是否按照 到SLC或用于在非易失性缓存中编程单元的TRIM的类型）。 此外，响应于来自主机的命令来对非易失性高速缓存进行大小，存储器系统可以超过或者不设置高速缓存。 此外，主机可以例如通过发送选择性刷新命令来控制非易失性高速缓存的操作。

公开(公告)号：US20170123991A1

公开(公告)日：2017-05-04

申请号：US14925334

申请日：2015-10-28

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Miki Sapir ,  Amir Shaharabany ,  Hadas Oshinsky ,  Alon Marcu ,  Nir Perry

IPC: G06F12/08

CPC classification number: G06F12/0868 ,  G06F11/0793 ,  G06F12/0207 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/202 ,  G06F2212/281 ,  G06F2212/313 ,  G06F2212/7203 ,  G11C16/102

Abstract: Systems and methods for managing a data buffer of a non-volatile memory system are disclosed. The method may include a controller of a storage system retrieving host data, storing the retrieved data in a data buffer and transferring the data to a non-volatile memory. The controller may then overwrite the retrieved data in the data buffer as soon as the retrieved data has been transferred to the non-volatile memory die but prior to sending a command to program that data to the non-volatile memory array of the non-volatile memory. The system includes a non-volatile memory with a plurality of data latches and a non-volatile memory array, a data buffer and a controller configured to free the data buffer for receiving new data as soon as the prior data is transferred to the data latches and prior to any indication on success of programming prior data to the non-volatile memory array.

公开(公告)号：US20170123721A1

公开(公告)日：2017-05-04

申请号：US14925541

申请日：2015-10-28

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Alon Marcu ,  Nir Perry ,  Miki Sapir ,  Hadas Oshinsky ,  Julian Vlaiko

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0611 ,  G06F3/0688

Abstract: Systems and methods for managing transfer of data into and out of a host data buffer of a host are disclosed. In one implementation, a partial write completion module of a storage system retrieves from the host, stores in a memory, and acknowledges retrieving and storing with a partial write completion message, each subset of a larger set of data associated with a host write command. The host may utilize received partial write completion messages to release and use the portion of the host data buffer that had been storing the subset identified in the message rather than waiting to release data associated with the host write command until all the data associated with the command is stored in the memory. The memory in which each subset is stored may be non-volatile memory in the storage device or a shadow buffer on the host or an external memory device.

公开(公告)号：US20170123722A1

公开(公告)日：2017-05-04

申请号：US14925619

申请日：2015-10-28

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Alon Marcu ,  Nir Perry ,  Miki Sapir ,  Hadas Oshinsky ,  Julian Vlaiko

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0611 ,  G06F3/0685 ,  G06F3/0688

Abstract: Systems and methods for managing transfer of data into and out of a host data buffer of a host are disclosed. In one implementation, a partial write completion module of a storage system retrieves from the host, stores in a memory, and acknowledges retrieving and storing with a partial write completion message, each subset of a larger set of data associated with a host write command. The host may utilize received partial write completion messages to release and use the portion of the host data buffer that had been storing the subset identified in the message rather than waiting to release data associated with the host write command until all the data associated with the command is stored in the memory. The memory in which each subset is stored may be non-volatile memory in the storage device or a shadow buffer on the host or an external memory device.

公开(公告)号：US10078614B2

公开(公告)日：2018-09-18

申请号：US14857136

申请日：2015-09-17

Applicant: SANDISK TECHNOLOGIES INC.

Inventor： Eliad Adi Klein ,  Rotem Sela ,  Miki Sapir

IPC: G06F13/42 ,  G06F13/16

CPC classification number: G06F13/4282 ,  G06F13/1668 ,  Y02D10/14 ,  Y02D10/151

Abstract: Data transfer between a data storage device and a peripheral device bypasses an application processor that is coupled to the data storage device and to the peripheral device. In one embodiment, the data storage device includes a memory controller configured to receive, from an application processor, a message indicating a set of logical addresses and a data transfer identifier corresponding to the set of logical addresses. The memory controller is responsive to a request for memory access that includes the data transfer identifier and that is received from a peripheral device. The memory controller is configured to respond to the request by performing a memory access operation based on the set of logical addresses.

公开(公告)号：US09323657B1

公开(公告)日：2016-04-26

申请号：US14594934

申请日：2015-01-12

Applicant: SanDisk Technologies Inc.

Inventor： Rotem Sela ,  Eliad Adi Klein ,  Miki Sapir

IPC: G06F12/02

CPC classification number: G06F11/073 ,  G06F11/0793 ,  G06F2212/1024

Abstract: A memory system and method for improving read latency of a high-priority partition are provided. In one embodiment, a memory system receives a command to store data in the memory. The memory system determines if the command specified that the data is to be stored in a standard partition in the memory or in a high-priority partition in the memory. If the command specified that the data is to be stored in a standard partition in the memory, the memory system stores the data using a first write technique. If the command specified that the data is to be stored in a high-priority partition in the memory, the memory system stores the data using a second write technique, wherein the second write technique provides improved read latency of the stored data. Other embodiments are disclosed.

Abstract translation: 提供了一种用于提高高优先级分区的读延迟的存储器系统和方法。 在一个实施例中，存储器系统接收将数据存储在存储器中的命令。 存储器系统确定命令是否将数据存储在存储器中的标准分区中或存储器中的高优先级分区中。 如果命令指定将数据存储在存储器中的标准分区中，则存储器系统使用第一写入技术存储数据。 如果命令指定数据要存储在存储器中的高优先级分区中，则存储器系统使用第二写入技术来存储数据，其中第二写入技术提供所存储数据的改进的读延迟。 公开了其他实施例。