公开(公告)号：US20220366969A1

公开(公告)日：2022-11-17

申请号：US17875865

申请日：2022-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon-Joo EOM ,  JOON-YOUNG PARK ,  YONGCHEOL BAE ,  WON YOUNG LEE ,  SEONGJIN JANG ,  JUNGHWAN CHOI ,  JOOSUN CHOI

IPC: G11C11/4096 ,  G11C11/4093 ,  G11C7/10

Abstract: An operation method of a semiconductor device is disclosed. The semiconductor device includes separate first and second dies in a package and receives first types of signals through first and second respective channels independent of each other and corresponding to the first and second respective dies. The method includes a step in which when information for controlling internal operations of the first and second dies is first applied to the first die through a first pad, the first die performs the internal operation and also transmits the information to the second die through an internal interface connecting the first die and the second die, and a step in which when the information is transmitted to the second die, the second die performs the internal operation.

公开(公告)号：US20190272867A1

公开(公告)日：2019-09-05

申请号：US16289747

申请日：2019-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon-Joo EOM ,  JOON-YOUNG PARK ,  YONGCHEOL BAE ,  WON YOUNG LEE ,  SEONGJIN JANG ,  JUNGHWAN CHOI ,  JOOSUN CHOI

IPC: G11C11/4096 ,  G11C7/10 ,  G11C11/4093

Abstract: An operation method of a semiconductor device is disclosed. The semiconductor device includes separate first and second dies in a package and receives first types of signals through first and second respective channels independent of each other and corresponding to the first and second respective dies. The method includes a step in which when information for controlling internal operations of the first and second dies is first applied to the first die through a first pad, the first die performs the internal operation and also transmits the information to the second die through an internal interface connecting the first die and the second die, and a step in which when the information is transmitted to the second die, the second die performs the internal operation.

公开(公告)号：US20180315468A1

公开(公告)日：2018-11-01

申请号：US16032837

申请日：2018-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon-Joo EOM ,  JOON-YOUNG PARK ,  YONGCHEOL BAE ,  WON YOUNG LEE ,  SEONGJIN JANG ,  JUNGHWAN CHOI ,  JOOSUN CHOI

IPC: G11C11/4096 ,  G11C11/4093 ,  G11C7/10

CPC classification number: G11C11/4096 ,  G11C7/1084 ,  G11C11/4093 ,  G11C2207/105

Abstract: A multi channel semiconductor device is disclosed. The multi channel device may include a substrate, a first die on the substrate and having a first channel to function as a first chip; and a second die on the substrate and having a second channel different from the first channel to function as a second chip and including the same storage capacity and physical size as the first die. An internal interface is disposed between the first and second dies. The internal interface is configured to transmit information for controlling internal operations of the first and second dies and first applied to a first recipient die of the first and second dies to the other die.

公开(公告)号：US20150023112A1

公开(公告)日：2015-01-22

申请号：US14248447

申请日：2014-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon-Joo EOM ,  BYONGMO MOON ,  YONGCHEOL BAE

IPC: H03K19/00 ,  G11C7/10

CPC classification number: G11C7/1084 ,  G11C7/1057 ,  G11C7/222 ,  G11C11/4076 ,  G11C11/4093 ,  G11C2207/105 ,  G11C2207/2272 ,  H03K19/0005

Abstract: An integrated circuit includes a data input such as a data pad for receiving an external data signal input and an on-die termination (ODT) information input for receiving ODT information from an external device. An ODT circuit selectively couples a termination resistor to the data pad based on the ODT information. An input buffer is coupled to the data pad for determining data that is input into the pad using a reference voltage. A reference voltage generator is coupled to the input buffer and generates the reference voltage on the basis of the ODT information.

Abstract translation: 集成电路包括诸如用于接收外部数据信号输入的数据焊盘和输入的用于从外部设备接收ODT信息的芯片上端接（ODT）信息的数据输入。 ODT电路基于ODT信息将终端电阻选择性地耦合到数据焊盘。 输入缓冲器耦合到数据焊盘，用于使用参考电压确定输入到焊盘的数据。 参考电压发生器耦合到输入缓冲器，并基于ODT信息产生参考电压。

公开(公告)号：US20180166122A1

公开(公告)日：2018-06-14

申请号：US15889783

申请日：2018-02-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon-Joo EOM ,  JOON-YOUNG PARK ,  YONGCHEOL BAE ,  WON YOUNG LEE ,  SEONGJIN JANG ,  JUNGHWAN CHOI ,  JOOSUN CHOI

IPC: G11C11/4096 ,  G11C7/10 ,  G11C11/4093

CPC classification number: G11C11/4096 ,  G11C7/1084 ,  G11C11/4093 ,  G11C2207/105

Abstract: A multi channel semiconductor device is disclosed. The multi channel device may include a substrate, a first die on the substrate and having a first channel to function as a first chip; and a second die on the substrate and having a second channel different from the first channel to function as a second chip and including the same storage capacity and physical size as the first die. An internal interface is disposed between the first and second dies. The internal interface is configured to transmit information for controlling internal operations of the first and second dies and first applied to a first recipient die of the first and second dies to the other die.

公开(公告)号：US20160118090A1

公开(公告)日：2016-04-28

申请号：US14731787

申请日：2015-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WON YOUNG LEE ,  YONGCHEOL BAE ,  JUNGHWAN CHOI

IPC: G11C7/10 ,  G11C11/4093 ,  G11C7/22

CPC classification number: G11C7/1087 ,  G11C7/1084

Abstract: Provided is a semiconductor device to prevent DC current from flowing between differential input signals. The semiconductor device includes a first input unit configured to buffer a first signal of differential input signals, a second input configured to buffer a second signal of the differential input signals, and a latch coupled between a first repeating node of the first input unit and a second repeating node of the second input unit to prevent duty variation of the first and second signals. The semiconductor device further includes a latch controller configured to selectively switch the operation of the latch based on states of the first and second signals appearing at the first and second repeating nodes during a time interval before preambles of the differential input signals are received.

Abstract translation: 提供了防止直流电流在差分输入信号之间流动的半导体器件。 半导体器件包括被配置为缓冲差分输入信号的第一信号的第一输入单元，被配置为缓冲差分输入信号的第二信号的第二输入，以及耦合在第一输入单元的第一中继节点与第一输入单元之间的锁存器 第二输入单元的第二重复节点，以防止第一和第二信号的占空比变化。 半导体器件还包括锁存器控制器，其被配置为基于在接收差分输入信号的前导码之前的时间间隔期间基于出现在第一和第二重复节点处的第一和第二信号的状态来选择性地切换锁存器的操作。