公开(公告)号：US10304840B2

公开(公告)日：2019-05-28

申请号：US15084785

申请日：2016-03-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Keun-hee Bai ,  Myeong-cheol Kim ,  Kwan-heum Lee ,  Do-hyoung Kim ,  Jin-wook Lee ,  Seung-mo Ha ,  Dong-Hoon Khang

IPC: H01L27/11 ,  H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165

Abstract: A semiconductor device includes a substrate, a fin active region pattern on the substrate, the fin active region pattern including an upper region and a lower region, a device isolation layer pattern surrounding the fin active region pattern, a gate pattern on the upper region of the fin active region pattern, and a stressor on the lower region of the fin active region pattern, wherein a top surface of the device isolation layer pattern is lower than a top surface of the upper region and higher than a top surface of the lower region.