公开(公告)号：US20230110711A1

公开(公告)日：2023-04-13

申请号：US17814057

申请日：2022-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Rahul MISHRA ,  Hyunsoo YANG ,  Ung Hwan PI

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

Abstract: A semiconductor memory device may be provided. The semiconductor memory device may include data storage patterns having respective first sides and respective second sides, a spin-orbit coupling (SOC) channel layer in common contact with the first sides of the data storage patterns, the SOC channel layer is configured to provide a spin-orbit torque to the data storage patterns, read access transistors connected between the second sides of respective ones of the data storage patterns and respective data lines, a write access transistor connected between a first end of the SOC channel layer and a source line, and a bit line connected to a second end of the SOC channel layer. Each of the data storage patterns comprises a free layer in contact with the SOC channel layer and an oxygen reservoir layer in contact with the free layer.

公开(公告)号：US20240296878A1

公开(公告)日：2024-09-05

申请号：US18662053

申请日：2024-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Rahul MISHRA ,  Hyunsoo YANG ,  Ung Hwan PI

IPC: G11C11/16 ,  H10B61/00 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85 ,  H10N52/80 ,  H10N52/85

CPC classification number: G11C11/1675 ,  G11C11/161 ,  G11C11/1673 ,  H10B61/20 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85 ,  H10N52/80 ,  H10N52/85 ,  G11C11/1655

Abstract: A semiconductor memory device may be provided. The semiconductor memory device may include data storage patterns having respective first sides and respective second sides, a spin-orbit coupling (SOC) channel layer in common contact with the first sides of the data storage patterns, the SOC channel layer is configured to provide a spin-orbit torque to the data storage patterns, read access transistors connected between the second sides of respective ones of the data storage patterns and respective data lines, a write access transistor connected between a first end of the SOC channel layer and a source line, and a bit line connected to a second end of the SOC channel layer. Each of the data storage patterns comprises a free layer in contact with the SOC channel layer and an oxygen reservoir layer in contact with the free layer.