Semiconductor memory devices and memory systems including the same

    公开(公告)号:US11495280B2

    公开(公告)日:2022-11-08

    申请号:US17399349

    申请日:2021-08-11

    Abstract: A semiconductor memory device includes an external resistor provided on a board and a plurality of memory dies mounted on the board, designated as a master die and slave dies. The memory dies are commonly connected to the external resistor. The master die performs a first impedance calibration operation during an initialization sequence of the semiconductor memory device and stores, in a first register set therein, first calibration data, a first voltage and a first temperature. Each of the slave dies, after the first impedance calibration operation is completed, performs a second impedance calibration operation during the initialization sequence and stores, in a second register set therein, second calibration data associated with the second impedance calibration operation and offset data corresponding to a difference between the first calibration data and the second calibration data.

    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20180232042A1

    公开(公告)日:2018-08-16

    申请号:US15829101

    申请日:2017-12-01

    Inventor: Kwanghyun Kim

    Abstract: A memory system according to example embodiments of the inventive concept may include a storage device and a memory device. The storage device includes a first interface circuit configured to be connected to a processor and a second interface circuit different from the first interface circuit. The memory device includes a third interface circuit configured to be connected to the processor based on a DRAM interface, a fourth interface circuit configured to be different from the third interface circuit and configured to be connected to the second interface circuit, and a random access memory divided into a first memory area and a second memory area. The first memory area is accessed by the processor through the third interface circuit and the second memory area is accessed by the storage device through the second interface circuit and the fourth interface circuit.

    Semiconductor memory device and method providing log information

    公开(公告)号:US12045496B2

    公开(公告)日:2024-07-23

    申请号:US17706324

    申请日:2022-03-28

    CPC classification number: G06F3/0655 G06F3/0604 G06F3/0679

    Abstract: A semiconductor memory device includes; a memory semiconductor die including a volatile memory device configured to perform a normal operation in response to at least one of a command and an address received from a host device, and a test chip vertically stacked with the memory semiconductor die and including a nonvolatile memory device. The test chip is configured in the normal mode to store log information corresponding to at least one of a command and an address received by the semiconductor memory device from the host device, and is further configured in a debugging mode to read the log information from the nonvolatile memory device.

    Mic structure and electronic device including the same

    公开(公告)号:US11968488B2

    公开(公告)日:2024-04-23

    申请号:US17850080

    申请日:2022-06-27

    CPC classification number: H04R1/083 H04R1/04 H04R1/2892 H04R1/326 H04R2499/11

    Abstract: An electronic device according to various embodiments may include: a housing, an acoustic hole formed in a first direction of the housing, an instrument installed in the housing in a second direction perpendicular to the first direction, a mic, and a mic holder including a body installed in the housing, a seat formed in the body part to receive the mic, a first opening formed in one surface of the body and connected to the seat, a second opening formed in another surface of the body, and a third opening formed in the body and connected to the acoustic hole. As the second opening of the mic holder is closed by an instrument of the electronic device closely attached to the other surface of the body part, an acoustic channel in which a sound introduced into the third opening is delivered to a mic hole of the mic may be formed.

    METHOD FOR CONTROLLING USER INTERFACE AND ELECTRONIC DEVICE SUPPORTING THE SAME
    5.
    发明申请
    METHOD FOR CONTROLLING USER INTERFACE AND ELECTRONIC DEVICE SUPPORTING THE SAME 审中-公开
    用于控制用户界面的方法和支持其的电子设备

    公开(公告)号:US20160070368A1

    公开(公告)日:2016-03-10

    申请号:US14846136

    申请日:2015-09-04

    CPC classification number: G06F3/03543 G06F3/04847 G06F3/0485 G06F3/165

    Abstract: An electronic device includes a display module. The electronic device also includes an input interface configured to be functionally connected to the electronic, to transmit an input detection signal to the electronic device by detecting an input of additional input unit formed at a side, and to transmit to the electronic device at least one of a movement signal generated by detecting a movement while an input of the additional input unit is maintained and a scroll signal generated by detecting an input of a scroll unit installed at a side. The electronic device further includes a processor configured to receive an input detection signal from the input interface, to receive at least one of the movement signal and the scroll signal while the input of the additional input unit is maintained, and to control a user interface based on the received signal.

    Abstract translation: 电子设备包括显示模块。 电子设备还包括被配置为功能地连接到电子的输入接口,通过检测形成在一侧的附加输入单元的输入来将输入检测信号发送到电子设备,并且向电子设备发送至少一个 通过检测附加输入单元的输入而检测移动而产生的移动信号,以及通过检测安装在一侧的滚动单元的输入而产生的滚动信号。 电子设备还包括处理器,其被配置为从输入接口接收输入检测信号,以在维持附加输入单元的输入的同时接收运动信号和滚动信号中的至少一个,并且控制基于用户界面的 接收信号。

    Electronic device including speaker module

    公开(公告)号:US11496819B2

    公开(公告)日:2022-11-08

    申请号:US17185143

    申请日:2021-02-25

    Abstract: An electronic device is provided The electronic device includes a first case member, a plurality of protruding members provided on the first case member or a supporting member disposed on the first case member, at least one speaker, an enclosure configured to receive at least a portion of the speaker and including a plurality of receiving recesses formed in a side surface of the enclosure, and engaging members engaged to the enclosure and at least partially positioned in the receiving recesses, respectively. The engaging members may be engaged to one of the plurality of protruding members, respectively, to fix the enclosure to the first case member or the support member disposed on the first case member. Other various embodiments are possible as well.

    Memory system and method of operating the same

    公开(公告)号:US10394305B2

    公开(公告)日:2019-08-27

    申请号:US15829101

    申请日:2017-12-01

    Inventor: Kwanghyun Kim

    Abstract: A memory system according to example embodiments of the inventive concept may include a storage device and a memory device. The storage device includes a first interface circuit configured to be connected to a processor and a second interface circuit different from the first interface circuit. The memory device includes a third interface circuit configured to be connected to the processor based on a DRAM interface, a fourth interface circuit configured to be different from the third interface circuit and configured to be connected to the second interface circuit, and a random access memory divided into a first memory area and a second memory area. The first memory area is accessed by the processor through the third interface circuit and the second memory area is accessed by the storage device through the second interface circuit and the fourth interface circuit.

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