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公开(公告)号:US20230125101A1
公开(公告)日:2023-04-27
申请号:US18088046
申请日:2022-12-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KWANGHO CHOI , JIN-YOUNG KIM , SE HWAN PARK , IL HAN PARK , JI-SANG LEE , JOONSUC JANG
IPC: G11C16/34 , G11C11/56 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/24 , H01L25/065 , H01L25/18 , H01L23/00
Abstract: A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.
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公开(公告)号:US20220101930A1
公开(公告)日:2022-03-31
申请号:US17359688
申请日:2021-06-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KWANGHO CHOI , JIN-YOUNG KIM , SE HWAN PARK , IL HAN PARK , JI-SANG LEE , JOONSUC JANG
IPC: G11C16/34 , G11C11/56 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/16 , G11C16/24 , H01L25/065 , H01L25/18 , H01L23/00
Abstract: A nonvolatile memory device includes a memory cell array having cell strings that each includes memory cells stacked on a substrate in a direction perpendicular to the substrate. A row decoder is connected with the memory cells through word lines. The row decoder applies a setting voltage to at least one word line of the word lines and floats the at least one word line during a floating time. A page buffer circuit is connected with the cell strings through bit lines. The page buffer senses voltage changes of the bit lines after the at least one word line is floated during the floating time and outputs a page buffer signal as a sensing result. A counter counts a number of off-cells in response to the page buffer signal. A detecting circuit outputs a detection signal associated with a defect cell based on the number of off-cells.
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