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公开(公告)号:US20210013324A1
公开(公告)日:2021-01-14
申请号:US17038004
申请日:2020-09-30
Inventor: Jin Bum KIM , MunHyeon KIM , Hyoung Sub KIM , Tae Jin PARK , Kwan Heum LEE , Chang Woo NOH , Maria TOLEDANO LU QUE , Hong Bae PARK , Si Hyung LEE , Sung Man WHANG
IPC: H01L29/66 , H01L29/78 , H01L29/423 , H01L29/786
Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.
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公开(公告)号:US20190198639A1
公开(公告)日:2019-06-27
申请号:US16037922
申请日:2018-07-17
Inventor: Jin Bum KIM , MunHyeon KIM , Hyoung Sub KIM , Tae Jin PARK , Kwan Heum LEE , Chang Woo NOH , Maria TOLEDANO LU QUE , Hong Bae PARK , Si Hyung LEE , Sung Man WHANG
IPC: H01L29/66 , H01L29/78 , H01L29/423 , H01L29/786
CPC classification number: H01L29/66545 , H01L29/42392 , H01L29/6656 , H01L29/66636 , H01L29/66795 , H01L29/7848 , H01L29/78696
Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.
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公开(公告)号:US20190267494A1
公开(公告)日:2019-08-29
申请号:US16254842
申请日:2019-01-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jin Bum KIM , Hyoung Sub KIM , Seong Heum CHOI , Jin Yong KIM , Tae Jin PARK , Seung Hun LEE
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02 , H01L21/30 , H01L29/66
Abstract: A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.
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