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公开(公告)号:US20210118907A1
公开(公告)日:2021-04-22
申请号:US17136851
申请日:2020-12-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sanghoon LEE , SUNGGIL KIM , SEULYE KIM , HWAEON SHIN , JOONSUK LEE , HYEEUN HONG
IPC: H01L27/11582 , H01L27/1157 , H01L21/02 , H01L29/66 , H01L21/3213 , H01L21/768 , H01L29/10 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L21/28
Abstract: Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method comprises sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures penetrating the mold structure, forming a trench penetrating the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern filling the horizontal recess region.
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公开(公告)号:US20190355741A1
公开(公告)日:2019-11-21
申请号:US16217696
申请日:2018-12-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: SANGHOON LEE , SUNGGIL KIM , SEULYE KIM , HWAEON SHIN , JOONSUK LEE , HYEEUN HONG
IPC: H01L27/11582 , H01L21/768 , H01L21/02 , H01L29/66 , H01L21/3213 , H01L29/10 , H01L21/28 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L27/1157
Abstract: Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method includes sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures that penetrate the mold structure, forming a trench that penetrates the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern that fills the horizontal recess region.
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