公开(公告)号：US20220013184A1

公开(公告)日：2022-01-13

申请号：US17336910

申请日：2021-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Garam KIM ,  Hyunggon KIM ,  Jisang LEE ,  Joonsuc JANG ,  Wontaeck JUNG

IPC: G11C16/34 ,  G11C16/12 ,  G11C16/26 ,  G11C16/30 ,  G11C16/24

Abstract: A memory device includes a memory cell array including a plurality of memory cells; a voltage generator configured to generate voltages used for a program operation and a verify operation for the memory cells; and control logic configured to perform a plurality of program loops while writing data to the memory cell array, such that first to N-th (e.g., N>=1) program loops including a program operation and a verify operation are performed and at least two program loops in which the verify operation is skipped are performed when a pass/fail determination of the program operation in the N-th program loop indicates a pass.

公开(公告)号：US20240203466A1

公开(公告)日：2024-06-20

申请号：US18230776

申请日：2023-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyoung PARK ,  Garam KIM ,  Joohwan KIM ,  Jindo BYUN ,  Eunseok SHIN ,  Hyunyoon CHO ,  Junghwan CHOI

IPC: G11C7/10 ,  H03K19/017

CPC classification number: G11C7/1066 ,  G11C7/1063 ,  H03K19/01742

Abstract: A transmitter configured to receive first to N-th data in parallel and sequentially output the first to N-th data in response to first to N-th clock signals having different phases from each other, where N is an integer of at least 2, the transmitter including first to N-th data selectors including a first data selector and a second data selector in correspondence to the first to N-th data, each of the first to N-th data selectors being configured to perform a logical operation on one of the first to N-th data and the first to N-th clock signals and output a plurality of data selection signals, a first pre-driver in correspondence to at least two data selectors among the first to N-th data selectors, the first pre-driver being configured to receive the plurality of data selection signals from the at least two data selectors.

公开(公告)号：US20250060885A1

公开(公告)日：2025-02-20

申请号：US18421352

申请日：2024-01-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woohyun KANG ,  Garam KIM ,  Jisoo KIM ,  Sangkwon MOON ,  Hyunkyo HO ,  Jin Gu JEONG ,  Youngjun HWANG

IPC: G06F3/06

Abstract: A storage device according to an embodiment includes a memory device configured to apply a first program voltage and a first verification voltage to a first word line and output, based on a program state of each of a plurality of memory cells connected to the first word line, a speed information representing a speed characteristic of each of the plurality of memory cells; and a memory controller configured to determine at least one memory cell to be programmed into a predetermined program state; determine, among the at least one memory cell, at least one target memory cell having a first speed characteristic based on the speed information; and perform a state-shaping operation to convert a data corresponding to the predetermined program state for the at least one target memory cell into a value corresponding to a program state different from the predetermined program state.