APPARATUS AND METHOD FOR SCRAMBLING IN A WIRELESS COMMUNICATION SYSTEM
    1.
    发明申请
    APPARATUS AND METHOD FOR SCRAMBLING IN A WIRELESS COMMUNICATION SYSTEM 审中-公开
    一种无线通信系统中的扫描方法

    公开(公告)号:US20140044217A1

    公开(公告)日:2014-02-13

    申请号:US14052033

    申请日:2013-10-11

    Abstract: An apparatus for a transmit end in a wireless communication system is provided. The apparatus includes at least one scrambler configured to scramble a transmission bit stream, wherein the at least one scrambler comprises, a first circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, a second circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, and operators configured to generate a scrambled bit stream, wherein each of the operators generates a scrambled bit using an input bit, an output bit from the first circulation unit and an output bit from the second circulation unit.

    Abstract translation: 提供了一种用于无线通信系统中的发送端的装置。 该装置包括至少一个扰码器,配置成对发送比特流进行加扰,其中至少一个扰频器包括:第一循环单元,被配置为在一个周期期间输出至少一个比特,用于对传输比特流进行加扰奇数比特 以及至少一个比特,用于对所述传输比特流的偶数位进行加扰;第二循环单元,被配置为在一个周期期间输出用于对所述传输比特流进行加扰奇数比特的至少一个比特,以及至少一个比特, 加扰传输比特流的偶数比特,以及被配置为生成加扰比特流的运算符,其中每个运算符使用输入比特生成加扰比特,来自第一循环单元的输出比特和来自第二循环单元的输出比特 循环单元

    ELECTRONIC SYSTEMS AND METHODS OF OPERATING ELECTRONIC SYSTEMS

    公开(公告)号:US20200050404A1

    公开(公告)日:2020-02-13

    申请号:US16657225

    申请日:2019-10-18

    Inventor: Dong-Min KIM

    Abstract: A method includes transmitting a command signal including a time-out time from a host to a storage device; determining, by the storage device, a first time amount, which is an amount of time required for the storage device to perform an operation corresponding to the command signal; when the first time amount is not greater than the time-out time, providing a first response signal including a success flag from the storage device to the host after the storage device performs the operation within the time-out time; when the first time amount is longer than the time-out time, providing a second response signal including the first time amount and a time-out reset flag from the storage device to the host; and when the host receives the second response signal, retransmitting the command signal to the storage device after the host resets the time-out time to the first time amount.

    MEMORY CARD SOCKET AND DATA PROCESSING DEVICE INCLUDING THE SAME
    6.
    发明申请
    MEMORY CARD SOCKET AND DATA PROCESSING DEVICE INCLUDING THE SAME 有权
    存储卡插座和数据处理装置,包括它们

    公开(公告)号:US20160048178A1

    公开(公告)日:2016-02-18

    申请号:US14826203

    申请日:2015-08-14

    Abstract: A data processing apparatus includes an electronic device configured to store data and instructions; a memory card; and a memory card socket in which the memory card is inserted. In certain disclosed systems and methods, the memory card socket includes: an insertion portion through which the memory card is inserted; a lock portion formed around an edge of the insertion portion, and that is configured to control attaching and detaching of the memory card based on instructions received from the electronic device; and a main body including the insertion portion and the lock portion and configured to accommodate the memory card via the insertion portion.

    Abstract translation: 一种数据处理装置,包括配置为存储数据和指令的电子设备; 存储卡 以及插入存储卡的存储卡插座。 在某些公开的系统和方法中,存储卡插座包括:插入部分,存储卡插入该插入部分; 锁定部分,形成在所述插入部分的边缘周围,并且被配置为基于从所述电子设备接收的指令来控制所述存储卡的附接和拆卸; 以及主体,其包括所述插入部和所述锁定部,并且经由所述插入部容纳所述存储卡。

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