SEMICONDUCTOR DEVICE
    1.
    发明公开

    公开(公告)号:US20230371237A1

    公开(公告)日:2023-11-16

    申请号:US18226891

    申请日:2023-07-27

    Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate including an element isolation film and an active region defined by the element isolation film; a word line crossing the active region in a first direction; and a bit line structure on the substrate and connected to the active region, the bit line structure extending in a second direction crossing the first direction, wherein the bit line structure includes a first cell interconnection film including an amorphous material or ruthenium, a second cell interconnection film on and extending along the first cell interconnection film and including ruthenium, and a cell capping film on and extending along the second cell interconnection film.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM COMPRISING THE SAME

    公开(公告)号:US20200182916A1

    公开(公告)日:2020-06-11

    申请号:US16420751

    申请日:2019-05-23

    Abstract: A semiconductor device is provided and includes: a voltage sensing circuit configured to output first and second sensing voltages based on a target voltage applied thereto; and a comparing circuit configured to generate a monitoring output signal based on levels of the first and second sensing voltages, wherein the voltage sensing circuit includes: a first transistor including a gate to receive a reference bias voltage, a source connected to an input node, and a drain connected to one end of a first resistive element; a second transistor provided in a current mirror structure with the first transistor, and including a drain connected to a third resistive element; and a second resistive element connected to another end of the first resistive element, the first sensing voltage being provided to both ends of the second resistive element, and the second sensing voltage being provided to both ends of the third resistive element.

    MEMORY MODULE, MEMORY SYSTEM INCLUDING THE SAME, AND DATA STORAGE SYSTEM INCLUDING THE MEMORY MODULE
    3.
    发明申请
    MEMORY MODULE, MEMORY SYSTEM INCLUDING THE SAME, AND DATA STORAGE SYSTEM INCLUDING THE MEMORY MODULE 有权
    存储器模块,包括其的存储器系统和包括存储器模块的数据存储系统

    公开(公告)号:US20160247552A1

    公开(公告)日:2016-08-25

    申请号:US15000319

    申请日:2016-01-19

    CPC classification number: G11C11/4093 G11C5/04 G11C5/063 G11C7/02 G11C11/4076

    Abstract: A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.

    Abstract translation: 存储器模块包括第一印刷电路板(PCB),其包括第一表面,第二表面,形成在第一表面上的第一抽头和形成在第二表面上的第二抽头,附接到第一PCB的第一缓冲器,以及第一印刷电路板 附接到第一PCB的存储器件,其中第一缓冲器被配置为将通过第一抽头输入的信号和第二抽头传送到第一存储器件,并且由信号中的第一缓冲器重新驱动的信号被传输到第二 模块通过第二个水龙头。

    SEMICONDUCTOR DEVICE HAVING ENHANCED SIGNAL INTEGRITY
    4.
    发明申请
    SEMICONDUCTOR DEVICE HAVING ENHANCED SIGNAL INTEGRITY 审中-公开
    具有增强信号完整性的半导体器件

    公开(公告)号:US20130313714A1

    公开(公告)日:2013-11-28

    申请号:US13837891

    申请日:2013-03-15

    Abstract: A semiconductor includes a first signal line commonly connected to a plurality of semiconductor devices and a second signal line commonly connected to one or more of the plurality of semiconductor devices. The first signal line has a first impedance per unit length, the second signal line has a second impedance per unit length, the second impedance per unit length is greater than the first impedance per unit length, and the first signal line has a longer routing length than the first signal line. Widths of the signal lines may be set to reduce a difference in the impedances.

    Abstract translation: 半导体包括共同连接到多个半导体器件的第一信号线和共同连接到多个半导体器件中的一个或多个的第二信号线。 第一信号线具有每单位长度的第一阻抗,第二信号线具有每单位长度的第二阻抗,每单位长度的第二阻抗大于每单位长度的第一阻抗,并且第一信号线具有较长的路由长度 比第一条信号线。 可以设置信号线的宽度以减小阻抗的差异。

    APPARATUS AND METHOD FOR DECODING AUDIO DATA
    9.
    发明申请
    APPARATUS AND METHOD FOR DECODING AUDIO DATA 有权
    解码音频数据的装置和方法

    公开(公告)号:US20140297290A1

    公开(公告)日:2014-10-02

    申请号:US14157157

    申请日:2014-01-16

    CPC classification number: G10L19/173 G10L19/035

    Abstract: An apparatus and method for decoding audio data. The apparatus for decoding the audio data may perform block data unpacking by preferring a channel order to a block order from a bitstream, and perform dithering through preferring a block order to a channel order. Complexity in decoding may be reduced through integrating bitstream searching and the bock data unpacking, and a dithering error may be prevented through processing the block data unpacking and the dithering separately.

    Abstract translation: 一种用于对音频数据进行解码的装置和方法。 用于对音频数据进行解码的装置可以通过优选从比特流的频道顺序到块顺序来执行块数据解包,并且通过优选块顺序到频道顺序来执行抖动。 可以通过集成比特流搜索和块状数据解包来减少解码的复杂度,并且可以通过分别处理块数据解包和抖动来防止抖动错误。

    IMAGE PROCESSING APPARATUS AND METHOD
    10.
    发明申请
    IMAGE PROCESSING APPARATUS AND METHOD 有权
    图像处理装置和方法

    公开(公告)号:US20140146873A1

    公开(公告)日:2014-05-29

    申请号:US14020019

    申请日:2013-09-06

    CPC classification number: H04N19/423 H04N19/119 H04N19/174

    Abstract: A method and apparatus for applying a tile size adaptively based on a size of a coding unit. An image processing apparatus may detect a size of a largest coding unit (LCU) used in encoding of a video from a header of a bitstream, may determine a tile size adaptively based on the detected size of the LCU, and may decode the bitstream in units of the LCU based on the determined tile size.

    Abstract translation: 一种基于编码单元的大小自适应地应用瓦片尺寸的方法和装置。 图像处理装置可以检测从比特流的头部编码视频中使用的最大编码单位(LCU)的大小,可以基于检测到的LCU的大小自适应地确定瓦片尺寸,并且可以对 基于确定的瓦片尺寸的LCU的单位。

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