Nonvolatile method device and sensing method of the same

    公开(公告)号:US10395727B2

    公开(公告)日:2019-08-27

    申请号:US15922967

    申请日:2018-03-16

    Abstract: A nonvolatile memory device includes multi-level cells. A sensing method of the nonvolatile memory device includes: precharging a bit line and a sense-out node during a first precharge interval; identifying a first state of a selected memory cell, by developing the sense-out node during a first develop time and sensing a first voltage level of the sense-out node; precharging the sense-out node to a second sense-out precharge voltage; and identifying the first state of the selected memory cell from a second state adjacent thereto, by developing the sense-out node during a second develop time different from the first develop time and sensing a second voltage level of the sense-out node.

    Resistive memory device having defined or variable erase unit size
    2.
    发明授权
    Resistive memory device having defined or variable erase unit size 有权
    具有限定或可变擦除单元尺寸的电阻式存储器件

    公开(公告)号:US09224462B2

    公开(公告)日:2015-12-29

    申请号:US13733384

    申请日:2013-01-03

    CPC classification number: G11C13/0023 G11C13/0097 G11C2213/71 G11C2213/77

    Abstract: A resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.

    Abstract translation: 一种电阻式存储器件,其同时擦除与擦除单元中包括的选定字线相连的存储单元。 擦除单元包括比包括在电阻式存储器件的存储器块中的字线少的字线。 然而,擦除验证可以以块为基础执行。

    RESISTIVE MEMORY DEVICE HAVING DEFINED OR VARIABLE ERASE UNIT SIZE
    3.
    发明申请
    RESISTIVE MEMORY DEVICE HAVING DEFINED OR VARIABLE ERASE UNIT SIZE 有权
    具有定义或可变擦除单位大小的电阻式存储器件

    公开(公告)号:US20130229855A1

    公开(公告)日:2013-09-05

    申请号:US13733384

    申请日:2013-01-03

    CPC classification number: G11C13/0023 G11C13/0097 G11C2213/71 G11C2213/77

    Abstract: Disclosed is a resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.

    Abstract translation: 公开了一种同时擦除连接到包括在擦除单元中的选定字线的存储单元的电阻式存储器件。 擦除单元包括比包括在电阻式存储器件的存储器块中的字线少的字线。 然而,擦除验证可以以块为基础执行。

Patent Agency Ranking