公开(公告)号：US20170061883A1

公开(公告)日：2017-03-02

申请号：US15018058

申请日：2016-02-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JONG CHAN LEE ,  WOONG HEE JEONG ,  DAE HO KIM ,  YOUNG KI SHIN ,  YOON HO KHANG ,  MYOUNG GEUN CHA

IPC: G09G3/3258 ,  H01L51/56 ,  H01L27/32 ,  H01L29/786 ,  G09G3/3233 ,  G09G3/3275

CPC classification number: H01L29/78621 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0214 ,  G09G2320/0233 ,  G09G2320/0238 ,  H01L27/124 ,  H01L27/1259 ,  H01L2227/323

Abstract: A display device according to an exemplary embodiment of the present invention includes: a substrate; a plurality of transistors formed on the substrate; and a light-emitting device connected to the plurality of transistors, wherein the transistor includes a gate electrode, the plurality of transistors include a first transistor and a second transistor of which lateral wall slope angles of the gate electrode are different from each other, and the first transistor further includes a doping control member formed on a lateral wall of the gate electrode.

Abstract translation: 根据本发明的示例性实施例的显示装置包括：基板; 形成在所述基板上的多个晶体管; 以及连接到所述多个晶体管的发光器件，其中所述晶体管包括栅电极，所述多个晶体管包括第一晶体管和栅电极的侧壁倾斜角彼此不同的第二晶体管，以及 第一晶体管还包括形成在栅电极的侧壁上的掺杂控制构件。

公开(公告)号：US20240023374A1

公开(公告)日：2024-01-18

申请号：US18471460

申请日：2023-09-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MYOUNG GEUN CHA ,  SANG GUN CHOI ,  SANG SUB KIM ,  JI YEONG SHIN ,  YONG SU LEE ,  KI SEOK CHOI

IPC: H10K59/121 ,  H10K59/123 ,  H10K59/124

CPC classification number: H10K59/1213 ,  H10K59/123 ,  H10K59/124 ,  H10K59/1216

Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.

公开(公告)号：US20220013617A1

公开(公告)日：2022-01-13

申请号：US17252670

申请日：2018-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MYOUNG GEUN CHA ,  SANG GUN CHOI ,  JI YEONG SHIN ,  YONG SU LEE

IPC: H01L27/32 ,  G09G3/32 ,  H01L51/00

Abstract: An exemplary embodiment of the present invention provides a display device including: a substrate including a display area including a plurality of pixels, a peripheral area around the display area, and a bending area that is disposed in the peripheral area and is bent or is able to be bent: a plurality of transistors disposed in the pixel; a driving voltage line that is disposed in the display, area and transmits a driving voltage; a driving voltage transmission line disposed in the peripheral area and connected to the driving voltage line; and an overlap layer that is conductive and overlaps at least one of the plurality of transistors in a plan view, wherein the overlap layer may be disposed in a layer between the substrate and the transistors, the overlap layer may include a first portion disposed in the display area and a second portion disposed in the peripheral area, the second portion may overlap the driving voltage transmission line in the plan view, the second portion may contact the driving voltage transmission line through a contact hole provided in a plurality of insulating layers disposed between the second portion and the driving voltage transmission line, and the contact hole may be disposed in the peripheral area between the display area and the bending area.

公开(公告)号：US20180069129A1

公开(公告)日：2018-03-08

申请号：US15704063

申请日：2017-09-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONG JO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG ,  DAE HO KIM ,  JAE NEUNG KIM ,  MYOUNG GEUN CHA ,  SANG GAB KIM ,  YU-GWANG JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20200258966A1

公开(公告)日：2020-08-13

申请号：US16575643

申请日：2019-09-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： MYOUNG GEUN CHA ,  SANG GUN CHOI ,  SANG SUB KIM ,  JI YEONG SHIN ,  YONG SU LEE ,  KI SEOK CHOI

IPC: H01L27/32

Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.

公开(公告)号：US20160308063A1

公开(公告)日：2016-10-20

申请号：US15194841

申请日：2016-06-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YONG SU LEE ,  YOON HO KHANG ,  DONG JO KIM ,  HYUN JAE NA ,  SANG HO PARK ,  SE HWAN YU ,  CHONG SUP CHANG ,  DAE HO KIM ,  JAE NEUNG KIM ,  MYOUNG GEUN CHA ,  SANG GAB KIM ,  YU-GWANG JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20140361302A1

公开(公告)日：2014-12-11

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SANG HO PARK ,  YOON HO KHANG ,  SE HWAN YU ,  YONG SU LEE ,  CHONG SUP CHANG ,  MYOUNG GEUN CHA ,  HYUN JAE NA

IPC: H01L27/12 ,  H01L29/45 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。