公开(公告)号：US20180048257A1

公开(公告)日：2018-02-15

申请号：US15791817

申请日：2017-10-24

Applicant: Renesas Electronics Corporation

Inventor： Toshiya NOZAWA ,  Yoshitaro KONDO ,  Yusuke SUGAWARA ,  Shoichi KAMIMURA ,  Masatoshi MAEDA ,  Yasuhiro SHIRAI

IPC: H02P29/68 ,  H02M7/48 ,  H02P29/024

CPC classification number: H02P29/68 ,  H02M7/48 ,  H02P29/027

Abstract: Erroneous mounting of a semiconductor power module can be more easily detected. A semiconductor power module (9) according to the present invention includes: a status signal generation unit (90) configured to detect a status in the semiconductor power module (9) and generate and output a status signal indicating the detected status; an identification information storage unit (91) configured to preliminarily store identification information for identifying the semiconductor power module (9) and output an identification signal indicating the identification information; and a switching unit (92) configured to select one of the status signal output from the status signal generation unit (90) and the identification signal output from the identification information storage unit (91) and output the selected signal to an outside of the semiconductor power module (9).

公开(公告)号：US20170170819A1

公开(公告)日：2017-06-15

申请号：US15444876

申请日：2017-02-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryo KANDA ,  Koichi YAMAZAKI ,  Hiroshi KUROIWA ,  Masatoshi MAEDA ,  Tetsu TODA

IPC: H03K17/082 ,  H03K5/24 ,  H03K17/567 ,  H01L29/40 ,  H01L29/06 ,  H01L27/092 ,  H03K3/356 ,  H01L29/78

CPC classification number: H03K17/0822 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0922 ,  H01L29/0619 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/404 ,  H01L29/7823 ,  H01L29/7835 ,  H01L2224/0603 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2924/00014 ,  H03K3/356 ,  H03K3/356113 ,  H03K5/01 ,  H03K5/04 ,  H03K5/24 ,  H03K5/2472 ,  H03K5/2481 ,  H03K17/567 ,  H03K2217/0081 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A driver IC includes a ring-shaped termination area, and a first area and a second area that are respectively arranged outside and inside the termination area on a layout. A sense MOS that is arranged between a floating terminal and a first sense node and is driven at a power supply voltage is formed in the termination area. A fault detection circuit that detects presence of a fault when a voltage of the first sense node is higher than a decision voltage that has been determined in advance in a period of time that a low side driver is driving a low side transistor into an ON state is formed in the first area.

公开(公告)号：US20170093325A1

公开(公告)日：2017-03-30

申请号：US15232176

申请日：2016-08-09

Applicant: Renesas Electronics Corporation

Inventor： Toshiya NOZAWA ,  Yoshitaro KONDO ,  Yusuke SUGAWARA ,  Shoichi KAMIMURA ,  Masatoshi MAEDA ,  Yasuhiro SHIRAI

IPC: H02P29/68 ,  H02P29/024

CPC classification number: H02P29/68 ,  H02M7/48 ,  H02P29/027

Abstract: Erroneous mounting of a semiconductor power module can be more easily detected. A semiconductor power module (9) according to the present invention includes: a status signal generation unit (90) configured to detect a status in the semiconductor power module (9) and generate and output a status signal indicating the detected status; an identification information storage unit (91) configured to preliminarily store identification information for identifying the semiconductor power module (9) and output an identification signal indicating the identification information; and a switching unit (92) configured to select one of the status signal output from the status signal generation unit (90) and the identification signal output from the identification information storage unit (91) and output the selected signal to an outside of the semiconductor power module (9).