公开(公告)号：US20180294220A1

公开(公告)日：2018-10-11

申请号：US16005022

申请日：2018-06-11

Applicant: Renesas Electronics Corporation

Inventor： Koujirou MATSUI ,  Takehiko SAKAMOTO ,  Kazuyuki UMEZU ,  Tomoaki UNO

IPC: H01L23/528 ,  H01L29/06 ,  H01L29/78 ,  H01L29/40 ,  H01L23/482 ,  H03K17/687 ,  H01L27/088 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L23/4824 ,  H01L23/53214 ,  H01L23/53228 ,  H01L27/088 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/7835 ,  H01L2224/16225 ,  H01L2924/13091 ,  H01L2924/19105 ,  H03K17/687 ,  H01L2924/00

Abstract: A plurality of unit MISFET elements connected in parallel with each other to make up a power MISFET are formed in an LDMOSFET forming region on a main surface of a semiconductor substrate. A control circuit that controls a gate voltage of the power MISFET is formed in a driver circuit region on the main surface of the semiconductor substrate. A wiring structure having a plurality of wiring layers made of the same metal material is formed on the semiconductor substrate. The gate electrodes of the plurality of unit MISFET elements formed in the LDMOSFET forming region are electrically connected to each other via gate wirings formed in all of the plurality of wiring layers made of the same metal material.

公开(公告)号：US20160204252A1

公开(公告)日：2016-07-14

申请号：US15073574

申请日：2016-03-17

Applicant: Renesas Electronics Corporation

Inventor： Koujirou MATSUI ,  Takehiko SAKAMOTO ,  Kazuyuki UMEZU ,  Tomoaki UNO

IPC: H01L29/78 ,  H01L23/528 ,  H03K17/687

CPC classification number: H01L23/528 ,  H01L23/4824 ,  H01L23/53214 ,  H01L23/53228 ,  H01L27/088 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/7835 ,  H01L2224/16225 ,  H01L2924/19105 ,  H03K17/687

Abstract: A plurality of unit MISFET elements connected in parallel with each other to make up a power MISFET are formed in an LDMOSFET forming region on a main surface of a semiconductor substrate. A control circuit that controls a gate voltage of the power MISFET is formed in a driver circuit region on the main surface of the semiconductor substrate. A wiring structure having a plurality of wiring layers made of the same metal material is formed on the semiconductor substrate. The gate electrodes of the plurality of unit MISFET elements formed in the LDMOSFET forming region are electrically connected to each other via gate wirings formed in all of the plurality of wiring layers made of the same metal material.

公开(公告)号：US20150137260A1

公开(公告)日：2015-05-21

申请号：US14470745

申请日：2014-08-27

Applicant: Renesas Electronics Corporation

Inventor： Koujirou MATSUI ,  Takehiko SAKAMOTO ,  Kazuyuki UMEZU ,  Tomoaki UNO

IPC: H01L23/528 ,  H01L23/532 ,  H01L27/088

CPC classification number: H01L23/528 ,  H01L23/4824 ,  H01L23/53214 ,  H01L23/53228 ,  H01L27/088 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/7835 ,  H01L2224/16225 ,  H01L2924/19105 ,  H03K17/687

Abstract: A plurality of unit MISFET elements connected in parallel with each other to make up a power MISFET are formed in an LDMOSFET forming region on a main surface of a semiconductor substrate. A control circuit that controls a gate voltage of the power MISFET is formed in a driver circuit region on the main surface of the semiconductor substrate. A wiring structure having a plurality of wiring layers made of the same metal material is formed on the semiconductor substrate. The gate electrodes of the plurality of unit MISFET elements formed in the LDMOSFET forming region are electrically connected to each other via gate wirings formed in all of the plurality of wiring layers made of the same metal material.

Abstract translation: 在半导体衬底的主表面上的LDMOSFET形成区域中形成多个并联连接以构成功率MISFET的单位MISFET元件。 控制电源MISFET的栅极电压的控制电路形成在半导体衬底的主表面上的驱动电路区域中。 在半导体衬底上形成具有由相同金属材料制成的多个布线层的布线结构。 形成在LDMOSFET形成区域中的多个单位MISFET元件的栅电极通过形成在由同一金属材料制成的多个布线层的全部中的栅极布线彼此电连接。