Transformer based gate drive circuit

    公开(公告)号:US10361698B2

    公开(公告)日:2019-07-23

    申请号:US15413166

    申请日:2017-01-23

    申请人: Raytheon Company

    摘要: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.

    Transformer based gate drive circuit

    公开(公告)号:US10778218B2

    公开(公告)日:2020-09-15

    申请号:US16520241

    申请日:2019-07-23

    申请人: Raytheon Company

    摘要: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.

    ACTIVE CLAMP DC/DC CONVERTER INCLUDING CURRENT SENSE PEAK CONTROL MODE CONTROL

    公开(公告)号:US20240072641A1

    公开(公告)日:2024-02-29

    申请号:US17893495

    申请日:2022-08-23

    申请人: Raytheon Company

    IPC分类号: H02M1/32 H02M1/00 H02M3/28

    摘要: An isolated DC/DC converter includes a primary stage, a transformer circuit, a secondary stage, an active clamp, a first current sense node, and a second current sense node. The primary stage includes a primary switching inverter configured to invert the source DC voltage into a high-frequency alternating current (AC) voltage. The transformer circuit adjusts an AC voltage level of the high-frequency AC voltage and outputs an adjusted AC voltage. The secondary stage includes a secondary switching converter to convert the adjusted AC voltage into a secondary voltage, and the active clamp is configured to clamp the secondary voltage to provide an output DC voltage. The first current sense node is included in the primary stage conducts a source current having a first current level, and the second current sense node is included in the secondary stage and conducts a clamp current having a second current level.

    Transformer based gate drive circuit

    公开(公告)号:US10784859B2

    公开(公告)日:2020-09-22

    申请号:US16520253

    申请日:2019-07-23

    申请人: Raytheon Company

    摘要: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.

    Transformer Based Gate Drive Circuit
    8.
    发明申请

    公开(公告)号:US20200106435A1

    公开(公告)日:2020-04-02

    申请号:US16520241

    申请日:2019-07-23

    申请人: Raytheon Company

    摘要: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.

    Transformer Based Gate Drive Circuit
    10.
    发明申请

    公开(公告)号:US20200106436A1

    公开(公告)日:2020-04-02

    申请号:US16520253

    申请日:2019-07-23

    申请人: Raytheon Company

    摘要: A gate drive circuit for generating asymmetric drive voltages comprises a gate drive transformer comprising: a primary winding responsive to a pulse width module (PWM) input signal to generate a bipolar signal having a positive bias voltage and a negative bias voltage; and a secondary winding responsive to the bipolar signal to generate a PWM output signal. A first charge pump is connected to the secondary winding responsive to the PWM output signal to generate a level shifted PWM output signal. A second charge pump is connected to the secondary winding to generate a readjusted PWM output signal by decreasing at least a portion of the level shifted PWM output signal. A gate switching device is connected to the first charge pump and second charge pump. A level shifted PWM output signal establishes an ON condition and the readjusted PWM output signal establishes an OFF condition of the gate MOSFET.