CAP LAYER REMOVAL IN A HIGH-K METAL GATE STACK BY USING AN ETCH PROCESS
    1.
    发明申请
    CAP LAYER REMOVAL IN A HIGH-K METAL GATE STACK BY USING AN ETCH PROCESS 有权
    通过使用蚀刻工艺在高K金属栅格叠层中去除CAP层

    公开(公告)号:US20100330808A1

    公开(公告)日:2010-12-30

    申请号:US12824534

    申请日:2010-06-28

    Abstract: In a replacement gate approach, the dielectric cap layers of the gate electrode structures are removed in a separate removal process, such as a plasma assisted etch process, in order to provide superior process conditions during the subsequent planarization of the interlayer dielectric material for exposing the sacrificial gate material. Due to the superior process conditions, the selective removal of the sacrificial gate material may be accomplished with enhanced uniformity, thereby also contributing to superior stability of transistor characteristics.

    Abstract translation: 在替代栅极方法中,在单独的去除工艺(例如等离子体辅助蚀刻工艺)中去除栅电极结构的电介质盖层,以便在层间电介质材料随后的平坦化期间提供优异的工艺条件, 牺牲栅材料。 由于优异的工艺条件,牺牲栅极材料的选择性去除可以通过增强的均匀性来实现,从而也有助于晶体管特性的优异的稳定性。

    Cap layer removal in a high-K metal gate stack by using an etch process
    2.
    发明授权
    Cap layer removal in a high-K metal gate stack by using an etch process 有权
    通过使用蚀刻工艺在高K金属栅极堆叠中去除盖层

    公开(公告)号:US08258062B2

    公开(公告)日:2012-09-04

    申请号:US12824534

    申请日:2010-06-28

    Abstract: In a replacement gate approach, the dielectric cap layers of the gate electrode structures are removed in a separate removal process, such as a plasma assisted etch process, in order to provide superior process conditions during the subsequent planarization of the interlayer dielectric material for exposing the sacrificial gate material. Due to the superior process conditions, the selective removal of the sacrificial gate material may be accomplished with enhanced uniformity, thereby also contributing to superior stability of transistor characteristics.

    Abstract translation: 在替代栅极方法中,在单独的去除工艺(例如等离子体辅助蚀刻工艺)中去除栅电极结构的电介质盖层,以便在层间电介质材料随后的平坦化期间提供优异的工艺条件, 牺牲栅材料。 由于优异的工艺条件,牺牲栅极材料的选择性去除可以通过增强的均匀性来实现,从而也有助于晶体管特性的优异的稳定性。

    Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning
    4.
    发明授权
    Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning 有权
    通过使用用于偏移间隔物图案化的硬掩模,在高K金属栅极堆叠中增强了覆盖层的完整性

    公开(公告)号:US07981740B2

    公开(公告)日:2011-07-19

    申请号:US12821583

    申请日:2010-06-23

    CPC classification number: H01L21/823864 H01L21/823807 H01L29/7843

    Abstract: When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure.

    Abstract translation: 当在复杂的高k金属栅极结构的基础上形成晶体管元件时,可以通过更有效地调节不同导电类型的晶体管的栅极高度来增强置换栅极方法的效率,当晶体管的介质盖层可能经历了 因此可能需要在一种类型的晶体管中随后适应最终的盖层厚度。 为此,可以在用于在一个栅电极结构中形成偏移间隔元件同时覆盖另一栅电极结构的处理顺序期间使用硬掩模材料。

    Cap removal in a high-k metal gate electrode structure by using a sacrificial fill material
    5.
    发明授权
    Cap removal in a high-k metal gate electrode structure by using a sacrificial fill material 有权
    通过使用牺牲填充材料在高k金属栅电极结构中去除帽

    公开(公告)号:US08329526B2

    公开(公告)日:2012-12-11

    申请号:US12905655

    申请日:2010-10-15

    CPC classification number: H01L21/823828 H01L21/823807 H01L29/7843

    Abstract: Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

    Abstract translation: 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层,从而可靠地保持保护性侧壁间隔结构的完整性,这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供,其可以基于湿式显影工艺而减小厚度,从而能够实现高度的工艺可控性。

    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL
    6.
    发明申请
    CAP REMOVAL IN A HIGH-K METAL GATE ELECTRODE STRUCTURE BY USING A SACRIFICIAL FILL MATERIAL 有权
    通过使用真空填充材料在高K金属电极结构中去除CAP

    公开(公告)号:US20110129980A1

    公开(公告)日:2011-06-02

    申请号:US12905655

    申请日:2010-10-15

    CPC classification number: H01L21/823828 H01L21/823807 H01L29/7843

    Abstract: Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

    Abstract translation: 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层,从而可靠地保持保护性侧壁间隔结构的完整性,这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供,其可以基于湿式显影工艺而减小厚度,从而能够实现高度的工艺可控性。

    ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING A HARD MASK FOR OFFSET SPACER PATTERNING
    8.
    发明申请
    ENHANCED CAP LAYER INTEGRITY IN A HIGH-K METAL GATE STACK BY USING A HARD MASK FOR OFFSET SPACER PATTERNING 有权
    通过使用硬掩模进行偏角平铺图案,在高K金属盖板上增强了盖层的整体性

    公开(公告)号:US20100330757A1

    公开(公告)日:2010-12-30

    申请号:US12821583

    申请日:2010-06-23

    CPC classification number: H01L21/823864 H01L21/823807 H01L29/7843

    Abstract: When forming transistor elements on the basis of sophisticated high-k metal gate structures, the efficiency of a replacement gate approach may be enhanced by more efficiently adjusting the gate height of transistors of different conductivity type when the dielectric cap layers of transistors may have experienced a different process history and may thus require a subsequent adaptation of the final cap layer thickness in one type of the transistors. For this purpose, a hard mask material may be used during a process sequence for forming offset spacer elements in one gate electrode structure while covering another gate electrode structure.

    Abstract translation: 当在复杂的高k金属栅极结构的基础上形成晶体管元件时,可以通过更有效地调节不同导电类型的晶体管的栅极高度来增强置换栅极方法的效率,当晶体管的介质盖层可能经历了 因此可能需要在一种类型的晶体管中随后适应最终的盖层厚度。 为此,可以在用于在一个栅电极结构中形成偏移间隔元件同时覆盖另一栅电极结构的处理顺序期间使用硬掩模材料。

    Sophisticated gate electrode structures formed by cap layer removal with reduced loss of embedded strain-inducing semiconductor material
    9.
    发明授权
    Sophisticated gate electrode structures formed by cap layer removal with reduced loss of embedded strain-inducing semiconductor material 有权
    通过盖层去除形成的复杂的栅极电极结构,并减少嵌入的应变诱导半导体材料的损耗

    公开(公告)号:US08765559B2

    公开(公告)日:2014-07-01

    申请号:US13358101

    申请日:2012-01-25

    CPC classification number: H01L21/823807 H01L21/823814

    Abstract: When forming sophisticated gate electrode structures, such as high-k metal gate electrode structures, an appropriate encapsulation may be achieved, while also undue material loss of a strain-inducing semiconductor material that is provided in one type of transistor may be avoided. To this end, the patterning of the protective spacer structure prior to depositing the strain-inducing semiconductor material may be achieved for each type of transistor on the basis of the same process flow, while, after the deposition of the strain-inducing semiconductor material, an etch stop layer may be provided so as to preserve integrity of the active regions.

    Abstract translation: 当形成诸如高k金属栅电极结构的复杂的栅电极结构时,可以实现适当的封装,同时也可以避免在一种晶体管中提供的应变诱导半导体材料的不适当的材料损耗。 为此,可以在沉积应变诱导半导体材料之前对保护间隔物结构进行图案化,其基于相同的工艺流程,对于每种类型的晶体管,在应变诱导半导体材料沉积之后, 可以提供蚀刻停止层,以便保持活性区域的完整性。

    Election system enabling coercion-free remote voting
    10.
    发明授权
    Election system enabling coercion-free remote voting 失效
    选举制度可实现无强制远程投票

    公开(公告)号:US07490768B2

    公开(公告)日:2009-02-17

    申请号:US11174760

    申请日:2005-07-05

    CPC classification number: G07C13/00

    Abstract: Election system enabling coercion-free remote voting wherein a remote voter transmits his/her selected vote to the election authority through a data transmission network such as the Internet network by using a host computer having a card reader, the vote being transmitted after the voter has introduced an identifying smart card into the card reader. At least one secret code is recorded into the smart card at the location of the election authority at the moment when the latter delivers the smart card, the secret code having to be input by the voter into the host computer when the voter wants to vote during an election in order for the vote to be transmitted to the election authority and validated by the election authority.

    Abstract translation: 选举制度允许无强制远程投票,其中远程投票人通过使用具有读卡器的主机通过诸如因特网的数据传输网络向选举当局发送他/她的所选投票,投票在投票人具有 在读卡器中引入了识别智能卡。 在选举当局递交智能卡的时刻,至少有一个秘密密码记录在选举当局的位置上,当选民希望投票时,秘密代码必须由投票人输入主计算机 选举,以便将投票方式转交选举当局并由选举当局确认。

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