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公开(公告)号：US11435525B2
公开(公告)日：2022-09-06
申请号：US16874176
申请日：2020-05-14
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tetsuya Iida , Yasutaka Nakashiba
Abstract: A semiconductor device includes a first insulating film, a first optical waveguide and a second optical waveguide. The first insulating film has a first surface and a second surface opposite to the first surface. The first optical waveguide is formed on the first surface of the first insulating film. The second optical waveguide is formed on the second surface of the first insulating film. The second optical waveguide, in plan view, overlaps with an end portion of the first optical waveguide without overlapping with another end portion of the first optical waveguide.
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公开(公告)号：US10818650B2
公开(公告)日：2020-10-27
申请号：US16598858
申请日：2019-10-10
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tetsuya Iida , Yasutaka Nakashiba
IPC: H01L25/16 , H01L31/105 , H01L31/02 , H01L31/0232 , H01L23/373 , H01L23/00 , G02B6/42 , H04B10/40
Abstract: The semiconductor module includes a semiconductor chip and a semiconductor chip. The semiconductor chip includes an optical device such as an optical waveguide, an optical receiver, and a grating coupler, and a wiring formed over the optical device. The semiconductor chip includes a semiconductor element such as a MISFET formed in the semiconductor substrate, and a wiring formed over the semiconductor element. a top surface of the semiconductor chip is laminated to a top surface of the semiconductor chip such that the wirings are in direct contact with each other. In the semiconductor substrate, a through hole having a circular shape in plan view is formed, in the through hole, an insulating film is formed as a cladding layer, and the semiconductor substrate surrounded by the through hole constitutes an optical waveguide.
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公开(公告)号：US10197822B2
公开(公告)日：2019-02-05
申请号：US15878619
申请日：2018-01-24
Applicant: Renesas Electronics Corporation
Inventor： Shinichi Kuwabara , Yasutaka Nakashiba , Tetsuya Iida , Shinichi Watanuki
IPC: G02F1/025 , H01L21/02 , H01L29/06 , H01L29/16 , H01L21/3065 , H01L21/311 , G02F1/015
Abstract: To reduce a production cost of a semiconductor device and provide a semiconductor device having improved characteristics. A grating coupler has a plurality of projections separated from each other in an optical waveguide direction and a slab portion formed between any two of the projections adjacent to each other and formed integrally with them; a MOS optical modulator has a projection extending in the optical waveguide direction and slab portions formed on both sides of the projection, respectively, and formed integrally therewith. The projection of the grating coupler and the MOS optical modulator is formed of a first semiconductor layer, a second insulating layer, and a second semiconductor layer stacked successively on a first insulating layer, while the grating coupler and the MOS optical modulator each have a slab portion formed of the first semiconductor layer.
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公开(公告)号：US11901288B2
公开(公告)日：2024-02-13
申请号：US16924968
申请日：2020-07-09
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tetsuya Iida , Yasutaka Nakashiba , Shinichi Uchida
IPC: H03F3/187 , H01L23/522 , H01L49/02 , H03M1/12 , H03F3/04
CPC classification number: H01L23/5227 , H01L23/5226 , H01L28/10 , H03F3/04 , H03M1/12
Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor element, and a multilayer wiring. The semiconductor element is formed on the semiconductor substrate. The multilayer wiring includes a wiring electrically connected with the semiconductor element, and a first inductor. The multilayer wiring is formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element. The first inductor is formed such that the first inductor electrically isolated from the wiring and is magnetically connected with the wiring.
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公开(公告)号：US10921514B2
公开(公告)日：2021-02-16
申请号：US16438067
申请日：2019-06-11
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tetsuya Iida , Yasutaka Nakashiba
Abstract: The semiconductor device includes an optical waveguide WG1 formed in a planar manner, and a three-dimensional optical waveguide WG2 optically connected with the optical waveguide WG1 and including a curved shape.
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Patent Agency Ranking
公开(公告)号：US10818591B2
公开(公告)日：2020-10-27
申请号：US15953872
申请日：2018-04-16
Applicant: Renesas Electronics Corporation
Inventor： Shinichi Uchida , Yasutaka Nakashiba , Tetsuya Iida , Shinichi Kuwabara
IPC: H01L23/522 , H01L23/528 , H01L49/02 , H01L21/768 , H01L21/3213 , H01L25/065 , H01L23/532 , H04B5/00
Abstract: A method of manufacturing a semiconductor device includes a step of: patterning a conductive film formed over an interlayer insulating film so as to form a coil and a conductive pattern in the same layer, and then forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the coil and the conductive pattern as a mask.
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公开(公告)号：US10120128B2
公开(公告)日：2018-11-06
申请号：US15729727
申请日：2017-10-11
Applicant: Renesas Electronics Corporation
Inventor： Tetsuya Iida , Yasutaka Nakashiba
Abstract: A semiconductor device includes: a first substrate; a surface insulating film formed over an upper surface of the first substrate; a BOX layer formed over the surface insulating film; an optical waveguide made of an SOI layer formed on the BOX layer; and a first interlayer insulating film formed over the BOX layer so as to cover the optical waveguide. The semiconductor device further includes: a trench formed in the surface insulating film and the first substrate below the optical waveguide; and a cladding layer made of a buried insulating film buried in the trench. A thickness of the BOX layer is 1 μm or less, and a distance from an interface between the optical waveguide and the BOX layer to a bottom surface of the trench is 2 μm or more.
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公开(公告)号：US08461927B2
公开(公告)日：2013-06-11
申请号：US13675820
申请日：2012-11-13
Applicant: Renesas Electronics Corporation
Inventor： Tsuyoshi Kawakami , Akihiko Furukawa , Satoshi Yamakawa , Tetsuya Iida , Masao Kondo , Yutaka Hoshino
IPC: H03F3/26
CPC classification number: H03F3/211 , H03F1/56 , H03F3/26 , H03F2200/537 , H03F2203/21139
Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.
Abstract translation: 为了实现功率放大电路的频率特性的更宽的带宽，通过二次电感器将分别以不同频率匹配的差分推挽放大器的输出组合在一起，并且输出组合信号。
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公开(公告)号：US11435645B2
公开(公告)日：2022-09-06
申请号：US16872805
申请日：2020-05-12
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Tetsuya Iida , Yasutaka Nakashiba
Abstract: A semiconductor device has a first semiconducting layer including an optical waveguide, a dielectric layer formed on the optical waveguide, and a conductive layer formed on the dielectric layer. A refractive index of a material of the conductive layer is smaller than a refractive index of a material of the first semiconductor layer.
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公开(公告)号：US10886213B2
公开(公告)日：2021-01-05
申请号：US16984710
申请日：2020-08-04
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Teruhiro Kuwajima , Yasutaka Nakashiba , Akira Matsumoto , Akio Ono , Tetsuya Iida
Abstract: A semiconductor device has a coil and wirings under the coil. In addition, a distance between the upper face of the wirings and the bottom face of the coil is 7 μm or larger, and the wirings have a plurality of linear wiring parts each wiring width of which is 1 μm or smaller. In addition, the linear wiring parts do not configure a loop wiring, and the coil and the linear wiring parts are overlapped with each other in planar view.
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