Abstract:
The device comprises a plurality of side by side transistor cells individually connected by a plurality of lead wires in a side-by-side lead wire array having a central axis. For reducing the effects of variations of mutual inductance among the various lead wires, and for providing a more uniform temperature from cell to cell, the individual lead wires are designed to have a self-inductance the magnitude of which is directly related to the distance of the particular lead wire from the central axis.
Abstract:
An apertured top ceramic member is mounted on a bottom ceramic member, the latter member having a first metallized area thereon on which a semiconductor chip is mounted and a second surrounding metallized area connected to the ground terminal of the device. A large gap is provided between portions of the first and second areas, the size of this gap affecting various characteristics of the device. Also, metallized areas are provided on the apertured member in overlapped but spaced apart relation with portions of the second area on the bottom member, the amount of overlap of these metallized areas affecting various capacitances of the device.