STARTUP CIRCUIT AND METHODS OF USE FOR AUDIO ACCESSORIES

    公开(公告)号:US20180146276A1

    公开(公告)日:2018-05-24

    申请号:US15472017

    申请日:2017-03-28

    CPC classification number: H04R1/1041 G06F3/165 H03H7/32 H04R2420/09

    Abstract: An accessory device, configured to be interfaced with a master device, and configured to operate in an analog mode and in a digital mode, the accessory device including: a startup circuit including: a first transistor that interfaces the accessory device to the master device, wherein the first transistor is configured with a first resistive capacitive (RC) circuit to turn on the first transistor according to a time constant of the first RC circuit; a second transistor coupled between ground and the first RC circuit, wherein the second transistor is configured to control a gate of the first transistor in response to a control signal; and a diode having an anode coupled to the first node and a cathode coupled to a body terminal of the first transistor.

    DELAY-FREE POLY-PHASE QUANTIZER AND QUANTIZATION METHOD FOR PWM MISMATCH SHAPING

    公开(公告)号:US20180234101A1

    公开(公告)日:2018-08-16

    申请号:US15435155

    申请日:2017-02-16

    CPC classification number: H03M1/0617 H03M3/42 H03M3/432 H03M3/47 H03M3/50

    Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.

    Protection of a speaker from thermal damage

    公开(公告)号:US09749739B2

    公开(公告)日:2017-08-29

    申请号:US14858306

    申请日:2015-09-18

    CPC classification number: H04R3/007 H04R29/001 H04R2203/00 H04R2430/01

    Abstract: A method of protecting a speaker from thermal damage includes determining a first load current through a first resistor that is coupled to the speaker. The method also includes converting the first load current to a digital value using a second load current through a second resistor as a reference input. The second resistor is part of a circuit that reduces an effect of a temperature coefficient of resistance of the first resistor. The method also includes comparing the digital value of the first load current to a threshold value. The method further includes, responsive to the first load current being larger than the threshold value, generating an instruction to take an action to protect the speaker.

    Envelope tracking system having fast transition time for a radio frequency (RF) amplifier

    公开(公告)号:US11271599B2

    公开(公告)日:2022-03-08

    申请号:US17125252

    申请日:2020-12-17

    Abstract: An envelope tracking system includes an envelope signal generator, a supply modulator coupled to the envelope signal generator, the supply modulator comprising a switching regulator path configured to provide an output voltage at an output node to a power amplifier when in an average power tracking (APT) mode, the switching regulator path configured to operate together with a linear path to provide the output voltage at the output node to the power amplifier when in an envelope tracking (ET) mode, a capacitor having a first and second terminal, the first terminal coupled to ground, a switch coupled between the output node and the second terminal of the capacitor, the switch being configured to selectively disconnect the capacitor from the output node, and a circuit coupled between the output node and the second terminal of the capacitor, the circuit comprising a bi-directional current-limiting switch, the circuit configured to charge or discharge the capacitor such that a voltage across the capacitor changes from a first voltage to a second voltage.

    High voltage switch with fast turn-off

    公开(公告)号:US11258409B2

    公开(公告)日:2022-02-22

    申请号:US16929353

    申请日:2020-07-15

    Abstract: Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.

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