公开(公告)号：US20220077830A1

公开(公告)日：2022-03-10

申请号：US17017239

申请日：2020-09-10

Applicant: QUALCOMM Incorporated

Inventor： Ying DUAN ,  Jing WU ,  Zhi ZHU

IPC: H03F3/45 ,  H03K5/24 ,  H03K3/037 ,  H04L25/03

Abstract: A receiver including a first differential sense amplifier configured to amplify an input differential data signal to generate an output differential data signal; a first set of one or more differential decision feedback equalizer (DFE) taps configured to modify the output differential data signal based on a set of one or more differential tap signals, wherein the first set of one or more differential DFE taps affect an output common mode voltage associated with the output differential data signal; and a compensation circuit configured to adjusts the output common mode voltage to compensate for the effect on the output common mode voltage by the set of one or more differential DFE taps. The compensation circuit includes reference and replica receivers to generate reference and replica output common mode voltages, and a feedback circuit to adjust the output common mode voltage based on the reference and replica output common mode voltages.

公开(公告)号：US20230246885A1

公开(公告)日：2023-08-03

申请号：US17589782

申请日：2022-01-31

Applicant: QUALCOMM Incorporated

Inventor： Miao LI ,  Zhiqin CHEN ,  Yu SONG ,  Hongmei LIAO ,  Zhi ZHU ,  Hao LIU ,  Lejie LU

IPC: H04L25/03 ,  H03F3/45

CPC classification number: H04L25/03057 ,  H03F3/45475

Abstract: A receiver has a first equalizer circuit that includes a first stage having a source degeneration circuit and a trans-impedance amplifier (TIA). The source degeneration circuit includes a resistor coupled in parallel with a capacitor. The TIA includes an embedded variable gain amplifier with a gain controlled by feedback resistors. Each feedback resistor is coupled between input and output of the TIA. In some implementations, the receiving circuit has a second equalizer circuit coupled in series with the first equalizer circuit. The second equalizer circuit includes a first stage having a source degeneration circuit and a TIA. The source degeneration circuit in the second equalizer circuit has a source degeneration resistor coupled in parallel with a source degeneration capacitor and the TIA includes an embedded variable gain amplifier whose gain is controlled by feedback resistors coupled between input and output of the TIA in the second equalizer circuit.

公开(公告)号：US20160204749A1

公开(公告)日：2016-07-14

申请号：US14595106

申请日：2015-01-12

Applicant: QUALCOMM Incorporated

Inventor： Miao LI ,  Li SUN ,  Zhi ZHU

IPC: H03F1/30 ,  H03F3/45 ,  H03G3/30

CPC classification number: H03F1/30 ,  H03F3/45076 ,  H03F3/45183 ,  H03F3/45197 ,  H03F3/4565 ,  H03F3/45766 ,  H03F2200/447 ,  H03F2200/543 ,  H03F2203/45048 ,  H03F2203/45101 ,  H03F2203/45116 ,  H03F2203/45244 ,  H03F2203/45456 ,  H03G1/0029 ,  H03G3/3036 ,  H03K19/00384 ,  H03K19/018528

Abstract: An apparatus is provided. The apparatus includes a calibration circuit configured to generate a reference signal and at least one differential circuit each being configured to operate at a calibrated transconductance over process or condition variations based on the reference signal. The calibration circuit may be configured to generate the reference signal independent of the at least one differential circuit. A method for operating at least one differential circuit is provided. The method includes generating a reference signal and operating the at least one differential circuit at a calibrated transconductance or gain over process or condition variations based on the reference signal. The reference signal may be generated independently of the at least one differential circuit.

Abstract translation: 提供了一种装置。 该装置包括被配置为产生参考信号的校准电路和至少一个差分电路，每个差分电路被配置为基于参考信号在校准的跨导处超过过程或条件变化进行操作。 校准电路可以被配置为独立于至少一个差分电路产生参考信号。 提供了一种用于操作至少一个差分电路的方法。 该方法包括产生参考信号并且以校准的跨导或基于参考信号的过程或条件变化获得的增益来操作至少一个差分电路。 参考信号可以独立于至少一个差分电路产生。

公开(公告)号：US20160099678A1

公开(公告)日：2016-04-07

申请号：US14507775

申请日：2014-10-06

Applicant: QUALCOMM Incorporated

Inventor： Xiaohua KONG ,  Deqiang SONG ,  Zhi ZHU ,  Cheng ZHONG

IPC: H03B5/12 ,  H03L7/099

CPC classification number: H03L7/099 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03C3/0925 ,  H03C3/0991 ,  H03L7/103 ,  H03L2207/06

Abstract: In one aspect, a VCO is provided. The VCO includes an inductor, a voltage-controlled capacitive element configured to operate with the inductor to generate an oscillating signal, a voltage supply configured to provide a plurality of voltages to the voltage-controlled capacitive element in a calibration mode, and a control circuit configured to store frequency information indicating frequencies of the oscillating signal in response to the plurality of voltages being provided to the voltage-controlled capacitive element. In another aspect, a PLL is provided. The PLL includes means for selecting, in an open loop configuration, a capacitance of a capacitor based on a target frequency and means for selecting, in a closed loop configuration, an operation voltage of a voltage-controlled capacitive element based on the capacitance of the capacitor.

Abstract translation: 在一个方面，提供VCO。 VCO包括电感器，被配置为与电感器一起工作以产生振荡信号的电压控制电容元件，配置成在校准模式下向压控电容元件提供多个电压的电压源，以及控制电路 被配置为存储响应于提供给所述压控电容元件的所述多个电压的振荡信号的频率的频率信息。 在另一方面，提供PLL。 PLL包括用于基于目标频率在开环配置中选择电容器的电容的装置，以及用于在闭环配置中基于电容的电容来选择压控电容元件的操作电压的装置 电容器。