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公开(公告)号：US09300316B2
公开(公告)日：2016-03-29
申请号：US14616464
申请日：2015-02-06
Applicant: QUALCOMM Incorporated
Inventor： Dinesh Jagannath Alladi , Sean Baker , Balasubramanian Sivakumar , Wei Huang , Dan Yuan
CPC classification number: H03M1/1245 , H03M1/0682 , H03M1/38 , H03M1/403 , H03M1/468 , H03M1/66
Abstract: In one embodiment, a circuit includes a first input of a comparator for an analog to digital converter (ADC). The first input is coupled to a first capacitive network. The circuit further includes a second input of the comparator for the ADC. The second input is coupled to a second capacitive network. The first capacitive network includes a first set of capacitors where a first plate of the first set of capacitors is selectively coupled to an input signal. The second capacitive network includes a second set of capacitors where a second plate of the first set of capacitors is selectively coupled to the input signal. The first plate and the second plate are opposite plates of the first set of capacitors and the second set of capacitors.
Abstract translation: 在一个实施例中，电路包括用于模数转换器（ADC）的比较器的第一输入端。 第一输入耦合到第一电容网络。 电路还包括用于ADC的比较器的第二输入。 第二输入耦合到第二电容网络。 第一电容网络包括第一组电容器，其中第一组电容器的第一板选择性地耦合到输入信号。 第二电容网络包括第二组电容器，其中第一组电容器的第二板选择性地耦合到输入信号。 第一板和第二板是第一组电容器和第二组电容器的相对的板。
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公开(公告)号：US20160087607A1
公开(公告)日：2016-03-24
申请号：US14495744
申请日：2014-09-24
Applicant: QUALCOMM Incorporated
Inventor： Omid Rajaee , Wei Huang , Yuhua Guo
CPC classification number: H03K5/2481 , H03K3/023
Abstract: Pumping current into a regeneration latch of a comparator, including: a first transistor configured to receive a first constant current from a first constant current source; a first current mirror coupled to the first transistor and configured to provide a first bias current, wherein the first transistor substantially mirrors the first constant current into the first bias current in the first current mirror; a second transistor configured to receive a second constant current from a second constant current source; a second current mirror coupled to the second transistor and configured to provide a second bias current, wherein the second transistor substantially mirrors the second constant current into the second bias current in the second current mirror; and a third transistor configured to combine the first bias current and the second bias current, wherein the third transistor pumps the combined bias current into the regeneration latch.
Abstract translation: 将电流泵送到比较器的再生锁存器中，包括：第一晶体管，被配置为从第一恒定电流源接收第一恒定电流; 耦合到所述第一晶体管并被配置为提供第一偏置电流的第一电流镜，其中所述第一晶体管基本上将所述第一恒定电流反射到所述第一电流镜中的所述第一偏置电流; 第二晶体管，被配置为从第二恒定电流源接收第二恒定电流; 耦合到所述第二晶体管并被配置为提供第二偏置电流的第二电流镜，其中所述第二晶体管基本上将所述第二恒定电流反射到所述第二电流镜中的所述第二偏置电流; 以及第三晶体管，被配置为组合所述第一偏置电流和所述第二偏置电流，其中所述第三晶体管将所述组合的偏置电流泵送到所述再生锁存器中。
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公开(公告)号：US20150249463A1
公开(公告)日：2015-09-03
申请号：US14616464
申请日：2015-02-06
Applicant: QUALCOMM Incorporated
Inventor： Dinesh Jagannath Alladi , Sean Baker , Balasubramanian Sivakumar , Wei Huang , Dan Yuan
CPC classification number: H03M1/1245 , H03M1/0682 , H03M1/38 , H03M1/403 , H03M1/468 , H03M1/66
Abstract: In one embodiment, a circuit includes a first input of a comparator for an analog to digital converter (ADC). The first input is coupled to a first capacitive network. The circuit further includes a second input of the comparator for the ADC. The second input is coupled to a second capacitive network. The first capacitive network includes a first set of capacitors where a first plate of the first set of capacitors is selectively coupled to an input signal. The second capacitive network includes a second set of capacitors where a second plate of the first set of capacitors is selectively coupled to the input signal. The first plate and the second plate are opposite plates of the first set of capacitors and the second set of capacitors.
Abstract translation: 在一个实施例中，电路包括用于模数转换器（ADC）的比较器的第一输入端。 第一输入耦合到第一电容网络。 电路还包括用于ADC的比较器的第二输入。 第二输入耦合到第二电容网络。 第一电容网络包括第一组电容器，其中第一组电容器的第一板选择性地耦合到输入信号。 第二电容网络包括第二组电容器，其中第一组电容器的第二板选择性地耦合到输入信号。 第一板和第二板是第一组电容器和第二组电容器的相对的板。
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