Reconfigurable LNA design for FR front end
    2.
    发明申请

    公开(公告)号:US20200059207A1

    公开(公告)日:2020-02-20

    申请号:US15999046

    申请日:2018-08-17

    Abstract: The present disclosure provides a reconfigurable low noise amplifier (LNA) circuit. This reconfigurable LNA circuit can be used for connecting multiple receive signal paths to a particular LNA in one configuration as well as used for connecting a single receive signal path to a particular LNA in another configuration. In the single receive signal path configuration, the single receive signal path is not degraded by the parasitics of a particular set of switches used for the multiple receive signal paths configuration.

    MULTIPHASE OSCILLATING SIGNAL GENERATION AND ACCURATE FAST FREQUENCY ESTIMATION
    3.
    发明申请
    MULTIPHASE OSCILLATING SIGNAL GENERATION AND ACCURATE FAST FREQUENCY ESTIMATION 审中-公开
    多相振荡信号的生成和精确的快速估计

    公开(公告)号:US20160065195A1

    公开(公告)日:2016-03-03

    申请号:US14471530

    申请日:2014-08-28

    CPC classification number: H03K5/1506 H03H11/22 H03H19/002 H03K2005/00286

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating multiple oscillating signals having different phases. One example multiphase generating circuit generally includes a first phase shifting circuit configured to phase shift an input signal having an input frequency, such that an output signal of the first phase shifting circuit has a first phase difference with respect to the input signal; a first frequency dividing circuit configured to receive the input signal and output a first set of signals having a first frequency less than the input frequency of the input signal; and a second frequency dividing circuit configured to receive the output signal of the first phase shifting circuit and output a second set of signals having a second frequency less than the input frequency of the input signal. The multiphase signals may be used for fast frequency estimation of the input signal or in N-path filters.

    Abstract translation: 本公开的某些方面提供了用于产生具有不同相位的多个振荡信号的方法和装置。 一个示例性多相生成电路通常包括:第一移相电路,被配置为使具有输入频率的输入信号相移,使得第一移相电路的输出信号相对于输入信号具有第一相位差; 第一分频电路,被配置为接收所述输入信号并输出​​具有小于所述输入信号的输入频率的第一频率的第一组信号; 以及第二分频电路,被配置为接收第一移相电路的输出信号并输出​​具有小于输入信号的输入频率的第二频率的第二组信号。 多相信号可用于输入信号的快速频率估计或N路径滤波器。

    LOCKING MULTIPLE VOLTAGE-CONTROLLED OSCILLATORS WITH A SINGLE PHASE-LOCKED LOOP
    5.
    发明申请
    LOCKING MULTIPLE VOLTAGE-CONTROLLED OSCILLATORS WITH A SINGLE PHASE-LOCKED LOOP 有权
    带有单相锁定环路的锁定多电压控制振荡器

    公开(公告)号:US20150295583A1

    公开(公告)日:2015-10-15

    申请号:US14251331

    申请日:2014-04-11

    CPC classification number: H03L7/099 H03L7/081 H03L7/093

    Abstract: Locking multiple VCOs to generate a plurality of LO frequencies, including: receiving a plurality of divided VCO feedback signals from a plurality of VCOs; receiving a reference signal multiplied by a predetermined number of the plurality of VCOs; generating and processing the predetermined number of phase differences between the multiplied reference signal and the plurality of divided VCO feedback signals in a single PLL circuit including a digital loop filter to receive and process the phase differences and generate (produce) a filter output, wherein the digital loop filter includes a plurality of delay cells equal to the predetermined number; and generating and outputting (delayed) control voltages for the plurality of VCOs based on the filter output.

    Abstract translation: 锁定多个VCO以产生多个LO频率,包括:从多个VCO接收多个分割的VCO反馈信号; 接收乘以所述多个VCO的预定数量的参考信号; 在包括数字环路滤波器的单个PLL电路中产生和处理倍增参考信号与多个分压VCO反馈信号之间的预定数量的相位差,以接收和处理相位差并产生(产生)滤波器输出,其中, 数字环路滤波器包括等于预定数量的多个延迟单元; 以及基于滤波器输出产生并输出(延迟的)多个VCO的控制电压。

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