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    High density embedded interconnects in substrate
    2.
    发明授权
    High density embedded interconnects in substrate 有权

    公开(公告)号：US10804195B2

    公开(公告)日：2020-10-13

    申请号：US16230896

    申请日：2018-12-21

    申请人： QUALCOMM Incorporated

    发明人： Kuiwon Kang ,  Marcus Hsu ,  Brigham Navaja ,  Houssam Jomaa

    IPC分类号： H01L23/522 ,  H01L23/00 ,  H01L21/768 ,  H01L23/528

    摘要： A device that includes a die and a substrate coupled to the die. The substrate includes a dielectric layer and a plurality of embedded interconnects. Each embedded interconnect located through a first planar surface of the substrate such that a first portion of the embedded interconnect is located within the dielectric layer and a second portion of the embedded interconnect is external of the dielectric layer. In some implementations, the substrate includes a core layer. In some implementations, the dielectric layer and the plurality of embedded interconnects may be part of a build up layer of the substrate.

    SPLIT DIE INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING DIE-TO-DIE (D2D) CONNECTIONS IN DIE-SUBSTRATE STANDOFF CAVITY, AND RELATED FABRICATION METHODS
    4.
    发明申请
    SPLIT DIE INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING DIE-TO-DIE (D2D) CONNECTIONS IN DIE-SUBSTRATE STANDOFF CAVITY, AND RELATED FABRICATION METHODS 有权

    公开(公告)号：US20230035627A1

    公开(公告)日：2023-02-02

    申请号：US17443740

    申请日：2021-07-27

    申请人： QUALCOMM Incorporated

    发明人： Aniket Patil ,  Brigham Navaja ,  Hong Bok We

    IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00

    摘要： Split die IC packages employing a D2D interconnect structure in a die-substrate standoff cavity (i.e., cavity) to provide D2D connections, and related fabrication methods. To facilitate D2D communications between multiple dies in the split die IC package, the package substrate also includes a D2D interconnect structure (e.g., interconnect bridge) that contains D2D interconnects (e.g., metal interconnects) coupled to the multiple dies to provide D2D signal routing between the multiple dies. The D2D interconnect structure is disposed in a cavity that is formed in a die standoff area between the dies and the package substrate as a result of the die interconnects being disposed between the dies and the package substrate standing off the dies from the package substrate. The D2D interconnect structure can be provided in the cavity in the IC package outside of the package substrate to reserve more area in the package substrate for other interconnections.

    HYBRID PACKAGE APPARATUS AND METHOD OF FABRICATING
    7.
    发明申请
    HYBRID PACKAGE APPARATUS AND METHOD OF FABRICATING 有权

    公开(公告)号：US20210305141A1

    公开(公告)日：2021-09-30

    申请号：US17211164

    申请日：2021-03-24

    申请人： QUALCOMM Incorporated

    发明人： Aniket Patil ,  Hong Bok We ,  Brigham Navaja

    IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L25/10 ,  H01L21/48

    摘要： Some features pertain to a hybrid package that includes a die, a first substrate structure, and a first metallization structure that is at least partially coplanar with the substrate. The die is electrically coupled to the first metallization structure and the first substrate through a second metallization structure. The first metallization structure is configured to provide an electrical path for data signaling. The second metallization structure is configured as a ground plane and is coupled to a ground signal. The first substrate structure is configured to provide an electrical path for power signaling.