Deblocking filter with reduced line buffer

    公开(公告)号:US09762921B2

    公开(公告)日:2017-09-12

    申请号:US13720499

    申请日:2012-12-19

    CPC classification number: H04N19/423 H04N19/80 H04N19/82

    Abstract: An apparatus configured to filter video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information comprising at least two adjacent video blocks, each video block comprising a plurality of video samples, and each video sample having a bit depth. The processor determines a filtered video sample based at least in part on a video sample and an adjustment value. The processor determines the adjustment value at least in part from an input with a limited bit depth. The input is determined from a set of one or more video samples, and its bit depth is limited such that it is less than the bit depth of the one or more video samples.

    Dedicated arithmetic encoding instruction
    3.
    发明授权
    Dedicated arithmetic encoding instruction 有权
    专用算术编码指令

    公开(公告)号:US09455743B2

    公开(公告)日:2016-09-27

    申请号:US14288018

    申请日:2014-05-27

    Abstract: A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

    Abstract translation: 一种方法包括在处理器处执行专用算术编码指令。 专用算术编码指令接受包括第一范围,第一偏移和第一状态的多个输入,并且基于多个输入产生一个或多个输出。 该方法还包括存储第二状态,重新对准第一范围以产生第二范围,以及基于专用算术编码指令的一个或多个输出来重新对准第一偏移以产生第二偏移。

    DEBLOCKING FILTER WITH REDUCED LINE BUFFER
    4.
    发明申请
    DEBLOCKING FILTER WITH REDUCED LINE BUFFER 有权
    具有减少线路缓冲器的阻塞滤波器

    公开(公告)号:US20140169483A1

    公开(公告)日:2014-06-19

    申请号:US13720499

    申请日:2012-12-19

    CPC classification number: H04N19/423 H04N19/80 H04N19/82

    Abstract: An apparatus configured to filter video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information comprising at least two adjacent video blocks, each video block comprising a plurality of video samples, and each video sample having a bit depth. The processor determines a filtered video sample based at least in part on a video sample and an adjustment value. The processor determines the adjustment value at least in part from an input with a limited bit depth. The input is determined from a set of one or more video samples, and its bit depth is limited such that it is less than the bit depth of the one or more video samples.

    Abstract translation: 被配置为根据某些方面对视频信息进行滤波的装置包括存储器单元和与存储器单元通信的处理器。 存储单元存储包括至少两个相邻视频块的视频信息,每个视频块包括多个视频样本,并且每个视频样本具有位深度。 处理器至少部分地基于视频样本和调整值来确定经滤波的视频样本。 处理器至少部分地从具有有限位深度的输入端确定调整值。 输入是从一组一个或多个视频样本确定的,并且其位深度受到限制,使得它小于一个或多个视频采样的位深度。

    DEDICATED ARITHMETIC ENCODING INSTRUCTION
    5.
    发明申请
    DEDICATED ARITHMETIC ENCODING INSTRUCTION 有权
    专用算术编码指令

    公开(公告)号:US20150349796A1

    公开(公告)日:2015-12-03

    申请号:US14288018

    申请日:2014-05-27

    Abstract: A method includes executing, at a processor, a dedicated arithmetic encoding instruction. The dedicated arithmetic encoding instruction accepts a plurality of inputs including a first range, a first offset, and a first state and produces one or more outputs based on the plurality of inputs. The method also includes storing a second state, realigning the first range to produce a second range, and realigning the first offset to produce a second offset based on the one or more outputs of the dedicated arithmetic encoding instruction.

    Abstract translation: 一种方法包括在处理器处执行专用算术编码指令。 专用算术编码指令接受包括第一范围,第一偏移和第一状态的多个输入,并且基于多个输入产生一个或多个输出。 该方法还包括存储第二状态,重新对准第一范围以产生第二范围,以及基于专用算术编码指令的一个或多个输出来重新对准第一偏移以产生第二偏移。

    SYSTEM AND METHOD FOR EFFICIENT POST-PROCESSING VIDEO STABILIZATION WITH CAMERA PATH LINEARIZATION
    7.
    发明申请
    SYSTEM AND METHOD FOR EFFICIENT POST-PROCESSING VIDEO STABILIZATION WITH CAMERA PATH LINEARIZATION 审中-公开
    使用摄像机路径线性化进行有效后处理视频稳定的系统和方法

    公开(公告)号:US20150022677A1

    公开(公告)日:2015-01-22

    申请号:US13943145

    申请日:2013-07-16

    CPC classification number: H04N5/23267 H04N5/23254 H04N5/23274

    Abstract: Described herein are methods, systems, and apparatus to process video images to remove jitteriness due to hand shake. In one aspect, a camera is configured to capture raw video composed of a series of successive image frames of a scene of interest. A processor is configured to receive the image frames, estimate a global camera motion from successive frames, stabilize the camera motion by establishing an upper bound and a lower bound of the global camera motion and smoothing the curve of camera motion between the upper and lower bounds, and upsample the resulting stabilized video frames to produce a smooth video.

    Abstract translation: 这里描述了处理视频图像以消除由于手抖动引起的抖动的方法,系统和装置。 在一个方面,相机被配置为捕获由感兴趣的场景的一系列连续图像帧组成的原始视频。 处理器被配置为接收图像帧,从连续帧估计全局摄像机运动,通过建立全局摄像机运动的上限和下限来平稳摄像机运动,并平滑上下两帧之间的摄像机运动曲线 ,并对所得到的稳定视频帧进行上采样以产生平滑的视频。

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