公开(公告)号：US20170068308A1

公开(公告)日：2017-03-09

申请号：US14846306

申请日：2015-09-04

Applicant: QUALCOMM INCORPORATED

Inventor： HEE JUN PARK ,  Haw-Jing LO ,  Keunsoo ROH

IPC: G06F1/32

CPC classification number: G06F1/3296 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3275 ,  Y02D10/14

Abstract: Systems, methods, and computer programs are disclosed for dynamically adjusting memory power state transition timers. One embodiment of a method comprises receiving one or more parameters impacting usage or performance of a memory device coupled to a processor in a computing device. An optimal value is determined for one or more memory power state transition timer settings. A current value is updated for the memory power state transition timer settings with the optimal value.

Abstract translation: 公开了用于动态调整存储器功率状态转换定时器的系统，方法和计算机程序。 方法的一个实施例包括接收影响与计算设备中的处理器耦合的存储器件的使用或性能的一个或多个参数。 确定一个或多个存储器功率状态转换定时器设置的最佳值。 对于具有最佳值的存储器电源状态转换定时器设置，更新当前值。

公开(公告)号：US20170148504A1

公开(公告)日：2017-05-25

申请号：US15340266

申请日：2016-11-01

Applicant: QUALCOMM Incorporated

Inventor： Mosaddiq SAIFUDDIN ,  SankaraRao KUNAPAREDDY ,  Keunsoo ROH ,  Chun Xiang HE ,  Pratik PATEL ,  Nicholas AMBUR ,  Jeremy HAUGEN

IPC: G11C11/406 ,  G11C7/10 ,  G11C11/408

CPC classification number: G11C11/40615 ,  G06F1/3225 ,  G06F1/3275 ,  G06F13/1636 ,  G11C7/1072 ,  G11C11/40611 ,  G11C11/40618 ,  G11C11/40622 ,  G11C11/4087

Abstract: In an embodiment, a dynamic random-access memory (DRAM) system configures an inactive portion of a DRAM die to operate in accordance with a self-refresh mode that is characterized by refreshes of the DRAM die being controlled by a local DRAM die controller integrated into the DRAM die. The DRAM system also configures an active portion of the DRAM die to operate in accordance with a controller-managed refresh mode while the inactive portion of the DRAM die operates in the self-refresh mode, the controller-managed refresh mode characterized by refreshes of the DRAM die being controlled by a controller that is external to the DRAM die.