公开(公告)号：US20140344513A1

公开(公告)日：2014-11-20

申请号：US13893670

申请日：2013-05-14

Applicant: QUALCOMM Incorporated

Inventor： Haw-Jing LO ,  Dexter CHUN

IPC: G11C11/406

CPC classification number: G11C11/40622 ,  G11C7/04 ,  G11C11/40603 ,  G11C11/40611 ,  G11C11/40626 ,  G11C11/4072

Abstract: Methods and devices for refreshing a dynamic memory device, (e.g., DRAM) to eliminate unnecessary page refresh operations. A value in a lookup table for the page may indicate whether valid data including all zeros is present in the page. When the page includes valid data of all zeros, the lookup table value may be set so that refresh, memory read, write and clear accesses of the page may be inhibited and a valid value may be returned. A second lookup table may contain a second value indicating whether a page has been accessed by a page read or write during the page refresh interval. A page refresh, by issuing an ACT−PRE command pair, and a page address may be performed according to the page refresh interval when the second value indicates that page access has not occurred.

Abstract translation: 用于刷新动态存储设备（例如，DRAM）以消除不必要的页面刷新操作的方法和设备。 该页面的查找表中的值可以指示页面中是否存在包括全部零的有效数据。 当页面包括全零的有效数据时，可以设置查找表值，使得可以禁止页面的刷新，存储器读取，写入和清除访问，并且可以返回有效值。 第二查找表可以包含指示在页面刷新间隔期间页面是否被页面读取或写入访问的第二值。 当第二个值指示没有发生页面访问时，可以根据页面刷新间隔来执行通过发出ACT-PRE命令对的页面刷新和页面地址。

公开(公告)号：US20170068308A1

公开(公告)日：2017-03-09

申请号：US14846306

申请日：2015-09-04

Applicant: QUALCOMM INCORPORATED

Inventor： HEE JUN PARK ,  Haw-Jing LO ,  Keunsoo ROH

IPC: G06F1/32

CPC classification number: G06F1/3296 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3275 ,  Y02D10/14

Abstract: Systems, methods, and computer programs are disclosed for dynamically adjusting memory power state transition timers. One embodiment of a method comprises receiving one or more parameters impacting usage or performance of a memory device coupled to a processor in a computing device. An optimal value is determined for one or more memory power state transition timer settings. A current value is updated for the memory power state transition timer settings with the optimal value.

Abstract translation: 公开了用于动态调整存储器功率状态转换定时器的系统，方法和计算机程序。 方法的一个实施例包括接收影响与计算设备中的处理器耦合的存储器件的使用或性能的一个或多个参数。 确定一个或多个存储器功率状态转换定时器设置的最佳值。 对于具有最佳值的存储器电源状态转换定时器设置，更新当前值。

公开(公告)号：US20190043558A1

公开(公告)日：2019-02-07

申请号：US15667618

申请日：2017-08-02

Applicant: QUALCOMM Incorporated

Inventor： Jungwon SUH ,  Yanru LI ,  Haw-Jing LO ,  Dexter Tamio CHUN

IPC: G11C11/406 ,  G11C7/10

CPC classification number: G11C11/40622 ,  G11C7/1006 ,  G11C7/1045 ,  G11C8/12 ,  G11C11/40611 ,  G11C11/40615 ,  G11C11/40618 ,  G11C2211/406

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.