知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

38 条记录 (耗时 0.025 秒)

    Selecting service nodes for an end-to-end service path from a reduced search space
    2.
    发明申请
    Selecting service nodes for an end-to-end service path from a reduced search space 有权
    从减少的搜索空间中选择服务节点以实现端到端服务路径

    公开(公告)号：US20080181118A1

    公开(公告)日：2008-07-31

    申请号：US11700441

    申请日：2007-01-31

    申请人： Puneet Sharma ,  Manish Jain ,  Sujata Banerjee

    发明人： Puneet Sharma ,  Manish Jain ,  Sujata Banerjee

    IPC分类号： G08C15/00 ,  H04L12/28

    CPC分类号： H04L67/16 ,  H04L45/02 ,  H04L45/306 ,  H04L45/48 ,  H04L45/64

    摘要： Service nodes in a service overlay network are selected to provide a service path for a requested service by determining a reduced search space of service nodes in the service overlay network that are operable to provide service components for the requested service. From the reduced search space of service nodes, service nodes are selected to form a service path that satisfies all quality of service constraints for the service.

    摘要翻译： 选择服务覆盖网络中的服务节点以通过确定服务覆盖网络中的可操作以提供所请求服务的服务组件的服务节点的减小的搜索空间来为所请求的服务提供服务路径。 从服务节点的减少的搜索空间中选择服务节点以形成满足服务的所有服务质量约束的服务路径。

    Method and system for providing applications to various devices
    3.
    发明授权
    Method and system for providing applications to various devices 有权
    用于向各种设备提供应用的方法和系统

    公开(公告)号：US08959536B2

    公开(公告)日：2015-02-17

    申请号：US12542990

    申请日：2009-08-18

    申请人： Sanjoy Paul ,  Manish Jain

    发明人： Sanjoy Paul ,  Manish Jain

    IPC分类号： G06F13/00 ,  H04N7/16 ,  G06F17/00 ,  H04H60/09 ,  H04L29/08 ,  H04M3/00 ,  G06F9/445

    CPC分类号： G06F8/64

    摘要： A method for providing applications to one or more requesting devices is provided. The method comprises a step of first receiving an application request from the one or more requesting devices. The method includes extracting details of the request. Further markup language structure for corresponding page of the application is generated. The markup language structure is generated by invoking page handlers which includes contacting business logic layer to get information required to be embedded in the corresponding page. The output page is then provided to the requesting device.

    摘要翻译： 提供了一种向一个或多个请求设备提供应用的方法。 该方法包括首先从一个或多个请求设备接收应用请求的步骤。 该方法包括提取请求的细节。 生成应用程序对应页面的进一步标记语言结构。 标记语言结构是通过调用页面处理程序生成的，其中包括联系业务逻辑层以获取需要嵌入在相应页面中的信息。 然后将输出页面提供给请求设备。

    METHOD AND SYSTEM FOR PROVIDING APPLICATIONS TO VARIOUS DEVICES
    5.
    发明申请
    METHOD AND SYSTEM FOR PROVIDING APPLICATIONS TO VARIOUS DEVICES 有权
    用于向各种设备提供应用的方法和系统

    公开(公告)号：US20100043017A1

    公开(公告)日：2010-02-18

    申请号：US12542990

    申请日：2009-08-18

    申请人： Sanjoy Paul ,  Manish Jain

    发明人： Sanjoy Paul ,  Manish Jain

    IPC分类号： G06F9/44 ,  G06F3/00

    CPC分类号： G06F8/64

    摘要： A method for providing applications to one or more requesting devices is provided. The method comprises a step of first receiving an application request from the one or more requesting devices. The method includes extracting details of the request. Further markup language structure for corresponding page of the application is generated. The markup language structure is generated by invoking page handlers which includes contacting business logic layer to get information required to be embedded in the corresponding page. The output page is then provided to the requesting device.

    摘要翻译： 提供了一种向一个或多个请求设备提供应用的方法。 该方法包括首先从一个或多个请求设备接收应用请求的步骤。 该方法包括提取请求的细节。 生成应用程序对应页面的进一步标记语言结构。 标记语言结构是通过调用页面处理程序生成的，其中包括联系业务逻辑层以获取需要嵌入在相应页面中的信息。 然后将输出页面提供给请求设备。

    METHOD AND APPARATUS FOR EXECUTING A HARDWARE SIMULATION AND VERIFICATION SOLUTION
    6.
    发明申请
    METHOD AND APPARATUS FOR EXECUTING A HARDWARE SIMULATION AND VERIFICATION SOLUTION 有权
    用于执行硬件仿真和验证解决方案的方法和装置

    公开(公告)号：US20090276738A1

    公开(公告)日：2009-11-05

    申请号：US12112222

    申请日：2008-04-30

    申请人： Manish Jain ,  Subha S. Chowdhury ,  Sridhar Seshadri

    发明人： Manish Jain ,  Subha S. Chowdhury ,  Sridhar Seshadri

    IPC分类号： G06F9/45

    CPC分类号： G06F17/5045 ,  G06F17/5022

    摘要： One embodiment of the present invention provides systems and techniques to execute a hardware simulation and verification solution on a multiprocessor system. The hardware simulation and verification solution can be partitioned into different modules which can include a simulation kernel to simulate changes in signal values, a value change dump module to store the changes in the signal values on a computer-readable storage medium, a functional coverage module to check functionality, a toggle coverage module to check signal toggling, an assertion engine to check complex behaviors, and a testbench module to generate test scenarios. Embodiments of the present invention can execute different modules on different processors, thereby improving performance.

    摘要翻译： 本发明的一个实施例提供了在多处理器系统上执行硬件仿真和验证解决方案的系统和技术。 硬件仿真和验证解决方案可以划分成不同的模块，其中可以包括模拟内核来模拟信号值的变化，值改变转储模块，用于将信号值的变化存储在计算机可读存储介质上，功能覆盖模块 检查功能，切换覆盖模块以检查信号切换，用于检查复杂行为的断言引擎，以及测试台模块来生成测试场景。 本发明的实施例可以在不同的处理器上执行不同的模块，从而提高性能。

    Method and apparatus for nano-pantography
    7.
    发明申请
    Method and apparatus for nano-pantography 有权
    纳米抄本的方法和装置

    公开(公告)号：US20070131646A1

    公开(公告)日：2007-06-14

    申请号：US11633233

    申请日：2006-12-04

    申请人： Vincent Donnelly ,  Demetre Economou ,  Paul Ruchhoeft ,  Lin Xu ,  Sri Vemula ,  Manish Jain

    发明人： Vincent Donnelly ,  Demetre Economou ,  Paul Ruchhoeft ,  Lin Xu ,  Sri Vemula ,  Manish Jain

    IPC分类号： B29D11/00 ,  G06F19/00 ,  B44C1/22 ,  C03C25/68

    CPC分类号： B29D11/00365 ,  B82Y30/00

    摘要： A method is provided for creating a plurality of substantially uniform nano-scale features in a substantially parallel manner in which an array of micro-lenses is positioned on a surface of a substrate, where each micro-lens includes a hole such that the bottom of the hole corresponds to a portion of the surface of the substrate. A flux of charged particles, e.g., a beam of positive ions of a selected element, is applied to the micro-lens array. The flux of charged particles is focused at selected focal points on the substrate surface at the bottoms of the holes of the micro-lens array. The substrate is tilted at one or more selected angles to displace the locations of the focal points across the substrate surface. By depositing material or etching the surface of the substrate, several substantially uniform nanometer sized features may be rapidly created in each hole on the surface of the substrate in a substantially parallel manner.

    摘要翻译： 提供了一种用于以基本上平行的方式产生多个基本均匀的纳米尺度特征的方法，其中微透镜阵列位于基底的表面上，其中每个微透镜包括孔，使得底部 孔对应于基板表面的一部分。 带电粒子的通量，例如所选元素的正离子束，被施加到微透镜阵列。 带电粒子的通量被聚焦在微透镜阵列的孔的底部的基底表面上的选定的焦点处。 衬底以一个或多个选定的角度倾斜，以便将焦点的位置移动穿过衬底表面。 通过沉积材料或蚀刻衬底的表面，可以以基本上平行的方式在衬底表面上的每个孔中快速产生几个基本均匀的纳米尺寸的特征。

    Enhancing speed of simulation of an IC design while testing scan circuitry
    10.
    发明授权
    Enhancing speed of simulation of an IC design while testing scan circuitry 有权
    在测试扫描电路时提高IC设计仿真的速度

    公开(公告)号：US07925940B2

    公开(公告)日：2011-04-12

    申请号：US11873800

    申请日：2007-10-17

    申请人： Yogesh Pandey ,  Vijay Anand Sankar ,  Manish Jain

    发明人： Yogesh Pandey ,  Vijay Anand Sankar ,  Manish Jain

    IPC分类号： G01R31/28 ,  G06F17/50 ,  G06F9/45

    CPC分类号： G06F11/267 ,  G01R31/318591 ,  G06F11/261

    摘要： A computer is programmed to prepare a computer program for simulating operation of an integrated circuit (IC) chip, in order to test scan circuitry therein. The computer is programmed to trace a path through combinational logic in a design of the IC chip, starting from an output port of a first scan cell and ending in an input port of a second scan cell. If the first and second scan cells receive a common scan enable signal, then the computer generates at least a portion of the computer program, i.e. software to perform simulation of propagating a signal through the path conditionally, for example when the common scan enable signal is inactive and alternatively to skip performing simulation when the common scan enable signal is active. The computer stores the portion of the computer program in memory, for use with other such portions of the computer program.

    摘要翻译： 计算机被编程为准备用于模拟集成电路（IC）芯片的操作的计算机程序，以便测试其中的扫描电路。 计算机被编程为通过IC芯片的设计中的组合逻辑来跟踪路径，从第一扫描单元的输出端口开始并且终止于第二扫描单元的输入端口。 如果第一和第二扫描单元接收到共同的扫描使能信号，则计算机生成计算机程序的至少一部分，即软件，以执行有条件地通过路径传播信号的模拟，例如当共用扫描使能信号为 当共用扫描使能信号有效时跳过执行仿真。 计算机将计算机程序的一部分存储在存储器中，以与计算机程序的其他这样的部分一起使用。