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公开(公告)号:US20170194688A1
公开(公告)日:2017-07-06
申请号:US14988463
申请日:2016-01-05
发明人: Vikas Sharma , Peter Bacon , Mark Moffat
IPC分类号: H01P1/18
摘要: Programmable multi-reflective phase shifters which provide reduced root-mean-square phase error, can be optimized for a desired frequency band, can compensate for process variations arising during manufacture, and can help offset system level performance shortfalls. Embodiments include a hybrid coupler (e.g., a Lange hybrid coupler) in combination with a multi-reflective reactance-based terminating circuit with a number of different configurations that permit various modes of operation, including a thermometric mode, a phase overlap mode with interstitial phase shift states, an extended range phase shift mode, and a “tweak bit” mode. A number of programmable or selectable RF phase shifters can be series or parallel connected to provide a desired gamut of phase shift.
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公开(公告)号:US20180076715A1
公开(公告)日:2018-03-15
申请号:US15266784
申请日:2016-09-15
发明人: Mark Moffat , Scott Andrew Parish , Quinn Kneller , Paul Denny , Simon Denny
CPC分类号: H02M3/3376 , H02M1/08 , H02M1/12 , H02M1/32 , H02M1/36 , H02M3/33507 , H02M3/337 , H02M2001/0009 , H02M2001/327
摘要: An improved electronic oscillator circuit suitable for use in an isolating DC-to-DC converter circuit, and an improved isolating DC-to-DC converter circuit. In one embodiment, an integrated circuit coupled to a transformer includes an oscillator and an output driver. The integrated circuit is preferably fabricated using a silicon-on-insulator technology. The oscillator outputs an alternating pulse signal defined by electrical characteristics of components other than the transformer. The alternating pulse signal is coupled to the output driver, the alternating output of which is coupled to corresponding legs of the primary winding of the transformer. The secondary winding of the transformer provides an electromagnetically coupled isolated output which may be rectified and filtered to produce a DC output voltage. Additional functionality, such as current protection circuitry for the improved circuits, may be readily added to the integrated circuit at little or no increase in cost.
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公开(公告)号:US09837325B2
公开(公告)日:2017-12-05
申请号:US14741303
申请日:2015-06-16
发明人: Mark Moffat , Andrew Christie , Duncan Pilgrim
CPC分类号: H01L22/14 , H01L22/32 , H01L23/15 , H01L23/3121 , H01L23/66 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/97 , H01L2223/6627 , H01L2224/131 , H01L2224/16227 , H01L2224/16235 , H01L2224/48227 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/10253 , H01L2924/14 , H01L2924/1421 , H01L2924/15159 , H01L2924/15162 , H01L2924/15192 , H01L2924/15787 , H01L2924/16251 , H01L2224/11 , H01L2224/81 , H01L2924/014 , H01L2224/85 , H01L2224/45099
摘要: An extension of conventional IC fabrication processes to include some of the concepts of flip-chip assemblies while producing a final “non-flip chip” circuit structure suitable for conventional packaging or for direct usage by customers. Multiple IC dies are fabricated on a semiconductor wafer in a conventional fashion, solder bumped, and singulated. The singulated dies are then flip-chip assembled onto a single tile substrate of thin-film material which has been patterned with vias, peripheral connection pads, and one or more ground planes. Once dies are flip-chip mounted to the thin-film tile, all of the dies on the entire tile may be probed using automated testing equipment. Once test probing is complete, the dies and tile are singulated into die/tile assemblies.
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公开(公告)号:US20160372387A1
公开(公告)日:2016-12-22
申请号:US14741303
申请日:2015-06-16
发明人: Mark Moffat , Andrew Christie , Duncan Pilgrim
IPC分类号: H01L21/66
CPC分类号: H01L22/14 , H01L22/32 , H01L23/15 , H01L23/3121 , H01L23/66 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/97 , H01L2223/6627 , H01L2224/131 , H01L2224/16227 , H01L2224/16235 , H01L2224/48227 , H01L2224/94 , H01L2224/97 , H01L2924/00014 , H01L2924/10253 , H01L2924/14 , H01L2924/1421 , H01L2924/15159 , H01L2924/15162 , H01L2924/15192 , H01L2924/15787 , H01L2924/16251 , H01L2224/11 , H01L2224/81 , H01L2924/014 , H01L2224/85 , H01L2224/45099
摘要: An extension of conventional IC fabrication processes to include some of the concepts of flip-chip assemblies while producing a final “non-flip chip” circuit structure suitable for conventional packaging or for direct usage by customers. Multiple IC dies are fabricated on a semiconductor wafer in a conventional fashion, solder bumped, and singulated. The singulated dies are then flip-chip assembled onto a single tile substrate of thin-film material which has been patterned with vias, peripheral connection pads, and one or more ground planes. Once dies are flip-chip mounted to the thin-film tile, all of the dies on the entire tile may be probed using automated testing equipment. Once test probing is complete, the dies and tile are singulated into die/tile assemblies.
摘要翻译: 传统IC制造工艺的扩展,包括倒装芯片组件的一些概念,同时产生适用于常规封装或直接由客户直接使用的最终“非倒装芯片”电路结构。 多个IC管芯以常规方式制造在半导体晶片上,焊料凸起并且被切割。 然后将单片模具倒装芯片组装到已经用通孔,外围连接焊盘和一个或多个接地平面图案化的薄膜材料的单个瓦片衬底上。 一旦模具倒装芯片安装到薄膜瓦片上,可以使用自动化测试设备探测整个瓦片上的所有模具。 一旦试验探测完成,将模具和瓦片分割成模具/瓦片组件。
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