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公开(公告)号:US09842645B2
公开(公告)日:2017-12-12
申请号:US15450648
申请日:2017-03-06
Inventor: Hiroyuki Tezuka , Yoshikazu Katoh
CPC classification number: G11C13/004 , G06F3/061 , G06F3/0625 , G06F3/0653 , G06F3/0679 , G11C13/0026 , G11C13/0061 , G11C13/0097 , G11C2213/79
Abstract: A nonvolatile memory device comprises: a nonvolatile memory; a resistance-time converter that outputs an end signal at timing according to a resistance value of the nonvolatile memory; and a time-digital converter that measures the time from input of a start signal to input of the end signal and converts the measured time into a digital value. The time-digital converter includes: a ring delay circuit that includes delay elements connected in a ring configuration; a counter circuit that counts the number of times of a rising edge or a falling edge in output of one of the delay elements; a first memory circuit that stores, based on the end signal, outputs of the delay elements as first data; and a second memory circuit that stores, based on the end signal, a count value of the counter circuit as second data.