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127 条记录 (耗时 0.034 秒)

    DYNAMIC BUFFER FOR STORAGE SYSTEM
    4.
    发明申请
    DYNAMIC BUFFER FOR STORAGE SYSTEM 有权

    公开(公告)号：US20220300198A1

    公开(公告)日：2022-09-22

    申请号：US17832309

    申请日：2022-06-03

    申请人： PURE STORAGE, INC.

    发明人： Ying Gao ,  Boris Feigin ,  Hari Kannan

    IPC分类号： G06F3/06

    摘要： A storage system has NVRAM (nonvolatile random-access memory), storage memory that includes SLC (single level cell) flash memory and QLC (quad level cell) flash memory, and a processor. The processor performs a method that includes determining that a size of a buffer of a storage system should be adjusted. The storage system comprises a non-volatile random-access memory (NVRAM), single level cell (SLC) flash memory, and quad level cell (QLC) flash memory. The buffer of the storage system comprises one or more of the NVRAM and a portion of the SLC flash memory. The method also includes adjusting the size of the buffer of the storage system to a first size.

    Multiple read data paths in a storage system
    5.
    发明授权
    Multiple read data paths in a storage system 有权

    公开(公告)号：US11442625B2

    公开(公告)日：2022-09-13

    申请号：US17213697

    申请日：2021-03-26

    申请人： Pure Storage, Inc.

    发明人： John D. Davis ,  John Hayes ,  Hari Kannan ,  Nenad Miladinovic ,  Zhangxi Tan

    IPC分类号： G06F3/06 ,  G06F11/10 ,  H03M13/37 ,  G11C29/52 ,  H03M13/15 ,  H03M13/11

    摘要： A storage cluster is provided. The storage cluster includes a plurality of storage nodes, each of the plurality of storage nodes having nonvolatile solid-state memory and a plurality of operations queues coupled to the solid-state memory. The plurality of storage nodes is configured to distribute the user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can access the user data with a failure of two of the plurality of storage nodes. Each of the plurality of storage nodes is configured to determine whether a read of 1 or more bits in the solid-state memory via a first path is within a latency budget. The plurality of storage nodes is configured to perform a read of user data or metadata via a second path, responsive to a determination that the read of the bit via the first path is not within the latency budget.

    STORAGE SYSTEM WITH SELECTABLE WRITE PATHS
    6.
    发明申请
    STORAGE SYSTEM WITH SELECTABLE WRITE PATHS 有权

    公开(公告)号：US20220206702A1

    公开(公告)日：2022-06-30

    申请号：US17139460

    申请日：2020-12-31

    申请人： PURE STORAGE, INC.

    发明人： Ying Gao ,  Boris Feigin ,  Hari Kannan ,  Igor Ostrovsky ,  Jeffrey Tofano

    IPC分类号： G06F3/06

    摘要： A storage system has a first memory, and a second memory that includes storage memory. The storage system has a processing device. The processing device is to select whether to write data to the first memory and write the data from the first memory to the second memory, or to write the data to the second memory bypassing the first memory. The processing device is to write portions of data for storage according to such selection.

    SEARCH ACCELERATION FOR ARTIFICIAL INTELLIGENCE
    8.
    发明申请
    SEARCH ACCELERATION FOR ARTIFICIAL INTELLIGENCE 有权

    公开(公告)号：US20210174208A1

    公开(公告)日：2021-06-10

    申请号：US17159982

    申请日：2021-01-27

    申请人： Pure Storage, Inc.

    发明人： Fabio Margaglia ,  Emily Potyraj ,  Hari Kannan ,  Cary A. Sandvig

    IPC分类号： G06N3/08 ,  G06N5/04

    摘要： An apparatus for artificial intelligence acceleration is provided. The apparatus includes a storage and compute system having a distributed, redundant key value store for metadata. The storage and compute system having distributed compute resources configurable to access, through a plurality of authorities, data in the solid-state memory, run inference with a deep learning model, generate vectors for the data and store the vectors in the key value store.

    HARDWARE ASSISTED DATA LOOKUP METHODS
    9.
    发明申请
    HARDWARE ASSISTED DATA LOOKUP METHODS 有权

    公开(公告)号：US20210073140A1

    公开(公告)日：2021-03-11

    申请号：US16953079

    申请日：2020-11-19

    申请人： Pure Storage, Inc.

    发明人： Brian T. Gold ,  John Hayes ,  Hari Kannan

    IPC分类号： G06F12/109 ,  G06F11/10 ,  G06F11/14 ,  G11C29/00

    摘要： A method for hardware assisted data lookup in a storage unit is provided. The method includes formatting data in at least one of a plurality of data formats for storage in the storage unit. The method includes configuring a logic unit with one or more parameters associated with the plurality of data formats and identifying incoming data with the one or more parameters as an instruction for execution.

    ADAPTIVE THRESHOLD FOR BAD FLASH MEMORY BLOCKS
    10.
    发明申请
    ADAPTIVE THRESHOLD FOR BAD FLASH MEMORY BLOCKS 审中-公开

    公开(公告)号：US20200327953A1

    公开(公告)日：2020-10-15

    申请号：US16381581

    申请日：2019-04-11

    申请人： Pure Storage, Inc.

    发明人： Matthew D. Fleming ,  John Roper ,  Hari Kannan ,  John Boyle ,  Eric Michael Verwillow ,  Nenad Miladinovic ,  Eric Mueller

    IPC分类号： G11C29/44 ,  G11C29/38

    摘要： A method of tracking flash memory in a storage system is provided. The method includes initializing a bad blocks threshold value and marking one or more planes or logical unit numbers (LUNs) of flash memory as bad, responsive to determining that bad blocks in the one or more planes or LUNs meet the bad blocks threshold value. The method includes adjusting the bad blocks threshold value, responsive to exceeding a threshold number or rate of retiring planes or LUNs of flash memory, and repeating the marking and the adjusting, with the bad blocks threshold value capped at a maximum threshold value.