公开(公告)号：US12148486B2

公开(公告)日：2024-11-19

申请号：US18181546

申请日：2023-03-10

Applicant: PHISON ELECTRONICS CORP.

Inventor： Hsiao-Yi Lin ,  Shih-Jia Zeng ,  Chen Yang Tang ,  Shi-Chieh Hsu ,  Wei Lin

IPC: G11C16/00 ,  G11C16/10 ,  G11C16/26 ,  G11C16/34

Abstract: A read voltage adjustment method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending a write command sequence instructing to program a plurality of first memory cells in a rewritable non-volatile memory module; sending a first read command sequence instructing to read the programmed first memory cells using a first read voltage level to obtain first count information; obtaining first compensation information corresponding to the first read voltage level, wherein the first compensation information reflects a deviation in evenly programming the first memory cells to a plurality of states; and adjusting the first read voltage level according to the first count information, the first compensation information, and default count information corresponding to the first read voltage level.

公开(公告)号：US20250078897A1

公开(公告)日：2025-03-06

申请号：US18481998

申请日：2023-10-05

Applicant: PHISON ELECTRONICS CORP.

Inventor： Shih-Jia Zeng ,  Chen Yang Tang ,  Hsuan Ming Kuo ,  Shi-Chieh Hsu ,  Wei Lin

IPC: G11C11/406 ,  G11C29/52

Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: detecting a status of a rewritable non-volatile memory module; and determining whether to perform a data refresh operation on the rewritable non-volatile memory module according to a first condition and a second condition. The first condition is related to a first physical unit in the rewritable non-volatile memory module. The second condition is related to a plurality of second physical units in the rewritable non-volatile memory module. The data refresh operation is configured to update data in the rewritable non-volatile memory module to reduce a bit error rate of the data.

公开(公告)号：US20240265983A1

公开(公告)日：2024-08-08

申请号：US18181546

申请日：2023-03-10

Applicant: PHISON ELECTRONICS CORP.

Inventor： Hsiao-Yi Lin ,  Shih-Jia Zeng ,  Chen Yang Tang ,  Shi-Chieh Hsu ,  Wei Lin

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C16/3459 ,  G11C16/102 ,  G11C16/26 ,  G11C16/3404

Abstract: A read voltage adjustment method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending a write command sequence instructing to program a plurality of first memory cells in a rewritable non-volatile memory module; sending a first read command sequence instructing to read the programmed first memory cells using a first read voltage level to obtain first count information; obtaining first compensation information corresponding to the first read voltage level, wherein the first compensation information reflects a deviation in evenly programming the first memory cells to a plurality of states; and adjusting the first read voltage level according to the first count information, the first compensation information, and default count information corresponding to the first read voltage level.