公开(公告)号：US20190157403A1

公开(公告)日：2019-05-23

申请号：US16261232

申请日：2019-01-29

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Eiji Yasuda ,  Toshikazu Imai ,  Ryosuke Okawa ,  Takeshi Imamura ,  Mitsuaki Sakamoto ,  Kazuma Yoshida ,  Masaaki Hirako ,  Yasuyuki Masumoto ,  Shigetoshi Sota ,  Tomonari Oota

IPC: H01L29/417 ,  H01L29/36 ,  H01L29/78 ,  H01L27/088 ,  H01L23/498 ,  H01L23/13 ,  H01L29/45 ,  H01L23/00

Abstract: A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors. The thickness of the backside electrode ranges from 25 to 35 μm, and the ratio of the thickness of the backside electrode to the thickness of a semiconductor layer including the semiconductor substrate and the low-concentration impurity layer is 0.32 or more.