公开(公告)号：US20230244262A1

公开(公告)日：2023-08-03

申请号：US18299007

申请日：2023-04-11

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hiroshi KOSHIDA ,  Shinzo KOYAMA ,  Tatsuya KABE ,  Masaki TAMARU

IPC: G05F3/26 ,  G01J1/44

CPC classification number: G05F3/265 ,  G01J1/44 ,  H01L27/082

Abstract: A substrate current suppression circuit includes: a fixed voltage line that supplies a fixed voltage to the collectors of the third and fourth transistors. The fixed voltage is a voltage higher than the base voltage of the third and fourth transistors when the first polarity is p type, and is a voltage lower than the base voltage when the first polarity is n type.

公开(公告)号：US20230353906A1

公开(公告)日：2023-11-02

申请号：US18345805

申请日：2023-06-30

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Toru OKINO ,  Shinzo KOYAMA ,  Shigeru SAITOU ,  Masato TAKEMOTO ,  Masaki TAMARU ,  Hiroshi KOSHIDA ,  Shigetaka KASUGA ,  Yugo NOSE

IPC: H04N25/779 ,  H04N25/69

CPC classification number: H04N25/779 ,  H04N25/69

Abstract: Effective pixels and a failure detection pixel are connected to a control signal line for controlling an operation of the pixels and to an output signal line for outputting a result of failure detection in the pixels. Among the effective pixels, the effective pixels in a same row are connected in common to a same control signal line, and the effective pixels in a same column are connected in common to a same output signal line. The failure detection pixel is connected in common to at least one of the control signal line or the output signal line and configured to detect a failure in any of the effective pixels connected to the at least one of the control signal line or the output signal line.

公开(公告)号：US20220003876A1

公开(公告)日：2022-01-06

申请号：US17480475

申请日：2021-09-21

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shigetaka KASUGA ,  Shinzo KOYAMA ,  Masaki TAMARU ,  Hiroshi KOSHIDA ,  Yugo NOSE ,  Masato TAKEMOTO

IPC: G01S17/894 ,  G01S17/10 ,  G01S7/4865 ,  H01L31/107

Abstract: A distance-image obtaining method includes: (A) setting a plurality of distance-divided segments in a depth direction, and (B) obtaining a distance image based on each of the plurality of distance-divided segments set. The obtaining of the distance image includes: obtaining a plurality of distance images by imaging two or more of the plurality of distance-divided segments, to obtain a first distance image group; and obtaining a plurality of distance images by imaging distance-divided segments, among the plurality of distance-divided segments, in a phase different from a phase of the two or more of the plurality of distance-divided segments, to obtain a second distance image group.

公开(公告)号：US20210072380A1

公开(公告)日：2021-03-11

申请号：US16982405

申请日：2019-03-14

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Hiroshi KOSHIDA ,  Shinzo KOYAMA ,  Motonori ISHII ,  Shigetaka KASUGA

IPC: G01S17/10 ,  G01S7/481 ,  G01S7/4865

Abstract: A distance measuring device is to be connected to a wave transmission module to transmit a measuring wave and a wave reception module including a first wave receiver and a second wave receiver, both of which receive the measuring wave reflected from a target. In this distance measuring device, a first wave reception period in which the first wave receiver receives the measuring wave and a second wave reception period in which the second wave receiver receives the measuring wave overlap with each other on a time axis. In addition, in this distance measuring device, a time lag is provided between respective beginning times of the first and second wave reception periods. The time lag is shorter than either the first wave reception period or the second wave reception period.