公开(公告)号：US4291388A

公开(公告)日：1981-09-22

申请号：US971593

申请日：1978-12-20

Applicant: Donald R. Ecker, Jr. ,  Ernst Dummermuth ,  Odo J. Struger

Inventor： Donald R. Ecker, Jr. ,  Ernst Dummermuth ,  Odo J. Struger

IPC: G05B19/05 ,  G06F11/14 ,  G06F11/16

CPC classification number: G05B19/058 ,  G06F11/14 ,  G05B2219/11101

Abstract: A programmable controller interfaces a numerical control system to sensing and operating devices that control the auxiliary functions on a machine tool. In the controller a microprocessor is coupled to a random-access memory (RAM) and an electrically alterable read-only memory (EAROM) through an address bus and a data bus. The RAM stores a user control program and an I/O image table that depicts the status of the sensing and operating devices on the machine tool. Under program control the microprocessor verifies the contents of the RAM and copies the verified contents into the EAROM. If the contents of the RAM are altered or lost, the master copy of data stored in the EAROM is reloaded into the RAM.

Abstract translation: 可编程控制器将数控系统连接到感应和操作机床上控制辅助功能的设备。 在控制器中，微处理器通过地址总线和数据总线耦合到随机存取存储器（RAM）和电可更改的只读存储器（EAROM）。 RAM存储用户控制程序和描绘机床上感测和操作设备状态的I / O映像表。 在程序控制下，微处理器验证RAM的内容，并将验证的内容复制到EAROM中。 如果RAM的内容被更改或丢失，则将存储在EAROM中的数据的主副本重新加载到RAM中。

公开(公告)号：US4118792A

公开(公告)日：1978-10-03

申请号：US790590

申请日：1977-04-25

Applicant: Odo J. Struger ,  Timothy E. McAdams ,  Ernst Dummermuth

Inventor： Odo J. Struger ,  Timothy E. McAdams ,  Ernst Dummermuth

IPC: G05B19/05 ,  G06F11/00 ,  G06F11/07 ,  G06F9/06

CPC classification number: G06F11/0751 ,  G05B19/058 ,  G06F11/0745 ,  G06F11/0757 ,  G06F11/0793 ,  G05B2219/1181 ,  G05B2219/14086

Abstract: Fault detection hardware is employed at the I/O interface racks of a programmable controller to detect fault conditions which may occur there. An I/O fault line is connected in daisy chain fashion between the I/O interface racks and the controller processor, and when a fault is indicated at any of the I/O interface racks, it is communicated to the controller processor through this line. The indicated I/O fault freezes, or holds, a microprocessor in the controller processor, and if the I/O fault persists for a preselected time interval, all operating devices connected to the programmable controller interface racks are decontrolled. A watchdog timer is also provided in the controller processor for detecting malfunction conditions which may occur at the processor. When such a condition is detected, the operating devices connected to the programmable controller interface racks are decontrolled.

Abstract translation: 在可编程控制器的I / O接口机架上采用故障检测硬件来检测可能出现的故障状况。 I / O故障线以菊花链方式连接在I / O接口机架和控制器处理器之间，当在任何I / O接口机架上显示故障时，它通过该线路传送到控制器处理器 。 指示的I / O故障冻结或保持控制器处理器中的微处理器，并且如果I / O故障持续预选的时间间隔，则连接到可编程控制器接口机架的所有操作设备都被解除控制。 在控制器处理器中还提供看门狗定时器，用于检测可能在处理器处发生的故障状况。 当检测到这种情况时，连接到可编程控制器接口机架的操作设备被解除控制。

公开(公告)号：US5297257A

公开(公告)日：1994-03-22

申请号：US686054

申请日：1991-04-15

Applicant: Odo J. Struger ,  Ernst Dummermuth

Inventor： Odo J. Struger ,  Ernst Dummermuth

IPC: G05B19/05

CPC classification number: G05B19/054 ,  G05B2219/1103 ,  G05B2219/1129 ,  G05B2219/1204 ,  G05B2219/1207 ,  G05B2219/13167

Abstract: A method for a distributed processing system which includes the steps of developing a control program for controlling outputs at a plurality of I/O nodes, distributing executable portions of the program to the I/O nodes through a network, broadcasting input status data from the I/O nodes on the network and controlling the outputs at the I/O nodes in response to the input status data broadcast on the network and the executable portions of the program residing at the I/O nodes.

Abstract translation: 一种分布式处理系统的方法，包括以下步骤：开发用于控制多个I / O节点的输出的控制程序，通过网络将程序的可执行部分分配给I / O节点，从 响应于在网络上广播的输入状态数据和驻留在I / O节点上的程序的可执行部分，控制I / O节点上的I / O节点。

公开(公告)号：US5285376A

公开(公告)日：1994-02-08

申请号：US782851

申请日：1991-10-24

Applicant: Odo J. Struger ,  Ernst Dummermuth ,  Greggory Cieslak

Inventor： Odo J. Struger ,  Ernst Dummermuth ,  Greggory Cieslak

IPC: G05B19/05 ,  G05B9/02

CPC classification number: G05B19/056 ,  Y10S706/90

Abstract: Fuzzy logic programming is provided for machine and process controllers. New input and output instructions are devised for ladder diagram programming, as well as methods of downloading fuzzy logic instructions from a programming terminal to a programmable controller processor and methods for executing such instructions in the programmable controller processor.

Abstract translation: 为机器和过程控制器提供模糊逻辑编程。 针对梯形图编程设计了新的输入和输出指令，以及从编程终端到可编程控制器处理器的模糊逻辑指令的下载方法以及在可编程控制器处理器中执行这些指令的方法。

公开(公告)号：US4888726A

公开(公告)日：1989-12-19

申请号：US41208

申请日：1987-04-22

Applicant: Odo J. Struger ,  Barry E. Sammons

Inventor： Odo J. Struger ,  Barry E. Sammons

IPC: G05B19/05 ,  G05B19/418 ,  H04L29/00

CPC classification number: G05B19/052 ,  G05B19/4185 ,  H04L29/00 ,  Y02P90/12 ,  Y02P90/18 ,  Y02P90/185

Abstract: A cluster of control processors are interconnected by a local area network and exchange data to carry out their control functions. Each controller executes a control program containing both conventional instructions and T-instructions which call for an operation on data maintained by another controller in the cluster. All data required to execute T-instructions is stored in a virtual I/O image table and each controller is responsible for keeping its section of this table up-to-date by periodically broadcasting its data on the local area network.

Abstract translation: 控制处理器的簇是通过局域网和交换数据互连以执行其控制功能。 每个控制器执行包含常规指令和T-指令要求对由集群中的另一控制器保持的数据的操作的控制程序。 执行T指令所需的所有数据都存储在虚拟I / O映像表中，每个控制器负责通过在局域网周期性地广播其数据来保持其表的最新部分。

公开(公告)号：US4275307A

公开(公告)日：1981-06-23

申请号：US38506

申请日：1979-05-14

Applicant: Odo J. Struger ,  Joseph R. Branc

Inventor： Odo J. Struger ,  Joseph R. Branc

IPC: H03K17/795 ,  H03K17/94 ,  G02B27/00

CPC classification number: H03K17/94 ,  H03K17/7955

Abstract: An input circuit for a digital control system includes a rectifier circuit, a current limiting circuit and a set of zener diodes which can be selectively employed to receive a wide variety of signals from industrial sensing devices. The signal is generated to an output drive circuit by an optocoupler which provides electrical isolation. The output drive circuit generates a logic level signal which is compatible with the digital electronic control system. The input circuit is particularly well suited for fabrication as an integrated circuit.

Abstract translation: 用于数字控制系统的输入电路包括整流器电路，限流电路和一组齐纳二极管，其可以选择性地用于从工业感测装置接收各种各样的信号。 该信号由提供电隔离的光耦合器产生到输出驱动电路。 输出驱动电路产生与数字电子控制系统兼容的逻辑电平信号。 输入电路特别适合作为集成电路的制造。

公开(公告)号：US4095094A

公开(公告)日：1978-06-13

申请号：US779916

申请日：1977-03-21

Applicant: Odo J. Struger ,  William W. Searcy ,  Ernest F. John

Inventor： Odo J. Struger ,  William W. Searcy ,  Ernest F. John

IPC: G05B19/05 ,  G05B23/02 ,  G06F11/10 ,  G06F11/277 ,  G06F11/30 ,  G06F1/00 ,  G05B11/00

CPC classification number: G06F11/277 ,  G05B19/058 ,  G06F11/10 ,  G05B2219/1181 ,  G05B2219/13142 ,  G05B2219/14057 ,  G05B2219/14074 ,  G05B2219/14086

Abstract: A programmable controller includes a hardwired monitor module which connects to the I/O address decoder and the central logic unit of the controller. The monitor module detects malfunctions which cause deviations in the operation of these elements from a prescribed pattern, and in response generates a disabling signal which deenergizes all operating devices on the controlled system. A diagnostic module is also included and is comprised of a set of routines stored in the controller memory which periodically direct the controller to operate according to a prescribed pattern and to indicate deviations from that pattern as a malfunction. Such malfunctions are indicated in a diagnostic register which connects to the monitor module.

公开(公告)号：US4691296A

公开(公告)日：1987-09-01

申请号：US672457

申请日：1984-11-16

Applicant: Odo J. Struger

Inventor： Odo J. Struger

IPC: G05B19/05 ,  G05B11/01

CPC classification number: G05B19/054

Abstract: In a programmable controller, addresses for a group of input/output modules are decoded to generate an enable signal to each respective module. To increase the density of I/O circuits per module without increasing the width of the data bus, the I/O modules are provided with enabling circuits that are responsive to a pair of associated enabling signals in one method of I/O scanning and responsive to an enabling signal and two or more byte addresses received in another method of I/O scanning. Circuit paths have been added on a backplane circuit board to allow each enable signal to be coupled to a pair of I/O modules in the first method of I/O scanning. In the second method of I/O scanning, the hardware for carrying out the first method is disabled and byte addresses are used to couple multiple bytes of I/O status to each I/O module.

Abstract translation: 在可编程控制器中，对一组输入/输出模块的地址进行解码，以产生每个相应模块的使能信号。 为了增加每个模块的I / O电路的密度，而不增加数据总线的宽度，I / O模块提供了使能电路，其响应一对相关的使能信号，采用一种I / O扫描方式和响应 到使能信号和在另一种I / O扫描方法中接收的两个或更多个字节地址。 在背板电路板上添加了电路路径，以便在第一种I / O扫描方法中使每个使能信号耦合到一对I / O模块。 在第二种I / O扫描方法中，执行第一种方法的硬件被禁用，字节地址用于将多个字节的I / O状态耦合到每个I / O模块。

公开(公告)号：US4477882A

公开(公告)日：1984-10-16

申请号：US352014

申请日：1982-02-24

Applicant: Gary L. Schumacher ,  Odo J. Struger ,  Ronald E. Schultz

Inventor： Gary L. Schumacher ,  Odo J. Struger ,  Ronald E. Schultz

IPC: G05B19/05 ,  G06F3/00 ,  G06F15/16

CPC classification number: G05B19/052

Abstract: Programmable controllers are connected in a ring by serial data links. Each controller periodically transmits information packets on the ring which contain its I/O image table data. All controllers on the ring receive such data and store it in their data tables, and such data is thus available for examination by each controller processor during its execution of the user's control program.

Abstract translation: 可编程控制器通过串行数据链路以环形方式连接。 每个控制器周期性地在环上发送包含其I / O映像表数据的信息包。 环上的所有控制器接收这样的数据并将其存储在其数据表中，并且这样的数据因此可用于每个控制器处理器在其执行用户的控制程序期间进行检查。

公开(公告)号：US4360913A

公开(公告)日：1982-11-23

申请号：US131126

申请日：1980-03-17

Applicant: Odo J. Struger ,  Ronald A. Brown

Inventor： Odo J. Struger ,  Ronald A. Brown

IPC: G05B19/05 ,  G06F13/22 ,  H04L5/24 ,  H04J6/00

CPC classification number: H04L5/245 ,  G05B19/054 ,  G06F13/22

Abstract: A preferred embodiment of an input module is connected through six address terminals and four data terminals to six banks of contacts. A single bank address is coupled to two latches in the module and then to two banks of contacts. A nibble of data is coupled from each of two banks of contacts to each of two corresponding data latches on the module. The sequential addressing of a low nibble bank and a high nibble bank and the latching of data therefrom is controlled by sequencing circuitry which is enabled each time a bank address is written to the module. In a second embodiment coded information is output through the six address terminals and decoded by two external decoders to multiplex 256 inputs to the processor. Such modules are particularly useful in multiplexing a large number of inputs to the processor of a programmable controller.

Abstract translation: 输入模块的优选实施例通过六个地址端子和四个数据端子连接到六个触点组。 单个存储体地址耦合到模块中的两个锁存器，然后耦合到两个触点组。 数据的半字节从两个触点组中的每一个耦合到模块上的两个对应的数据锁存器中的每一个。 低半字节组和高半字节组的顺序寻址以及数据的锁存由排序电路控制，排序电路每当存储区地址被写入模块时被使能。 在第二实施例中，编码信息通过六个地址终端输出，并由两个外部解码器解码，以将256个输入复用到处理器。 这样的模块在将大量输入复用到可编程控制器的处理器中特别有用。