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公开(公告)号:US10177725B2
公开(公告)日:2019-01-08
申请号:US15536242
申请日:2015-12-14
Applicant: NORDIC SEMICONDUCTOR ASA
Inventor: Phil Corbishley
IPC: H03F3/45
Abstract: A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.
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公开(公告)号:US09924558B2
公开(公告)日:2018-03-20
申请号:US14896367
申请日:2014-06-04
Applicant: NORDIC SEMICONDUCTOR ASA
Inventor: David Alexandre Engelien-Lopes , Sverre Wichlund , Phil Corbishley
CPC classification number: H04W76/19 , H04L1/0009 , H04L1/0023 , H04L1/08 , H04W4/80
Abstract: A method of digital radio communication between a first device (2) and a second device (8), where each device comprises a radio transmitter (4, 10) and a radio receiver (6, 12), the method comprising: a) said first and second devices (2, 8) establishing a connection using a predetermined protocol having at least one predefined message format; and b) said first and second devices (2, 8) agreeing that in the event of said connection being broken a re-connection may be established using a coding scheme in which at least some bits specified in said predefined message format are represented by a plurality of bits transmitted.
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公开(公告)号:US09942070B2
公开(公告)日:2018-04-10
申请号:US15312148
申请日:2015-06-09
Applicant: Nordic Semiconductor ASA
Inventor: David Alexandre Engelien-Lopes , Sverre Wichlund , Eivind Olsen , Phil Corbishley , Ola Bruset
IPC: H04L27/20 , H04B1/7073 , H04J13/00 , H04J13/10 , H04L27/233 , H04L27/26 , H04L7/00 , H04L27/18 , H04L27/22 , H04L23/02 , H04L27/00
CPC classification number: H04L27/2017 , H04B1/7073 , H04J13/0074 , H04J13/10 , H04L7/00 , H04L23/02 , H04L27/18 , H04L27/2003 , H04L27/22 , H04L27/233 , H04L27/2659 , H04L27/2662 , H04L2027/0046 , H04L2027/0065
Abstract: A radio transmitter (4) comprises an encoder (5) that receives one or more variable message bits, and encodes each message bit that has a first value as a predetermined first binary chip sequence and encodes each message bit that has the opposite value as a predetermined second binary chip sequence. The radio transmitter (4) transmits data packets, each comprising (i) a predetermined synchronization portion, comprising one or more instances of the first binary chip sequence, and (ii) a variable data portion, comprising one or more encoded message bits output by the encoder. A radio receiver (9) receives such data packets. It uses the synchronization portion of a received data packet to perform a frequency and/or timing synchronization operation, and then decodes message bits from the data portion of the data packet.
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公开(公告)号:US09847809B2
公开(公告)日:2017-12-19
申请号:US15106141
申请日:2014-12-10
Applicant: Nordic Semiconductor ASA
Inventor: David Alexandre Engelien-Lopes , Sverre Wichlund , Phil Corbishley
IPC: H03D1/00 , H04L27/06 , H04B1/7087 , H04L27/00 , H04L27/227 , H04B17/336 , H04L5/00 , H04W4/00
CPC classification number: H04B1/7087 , H04B17/336 , H04B2201/69 , H04L5/006 , H04L27/0014 , H04L27/227 , H04L2027/0026 , H04L2027/0034 , H04L2027/0046 , H04W4/80
Abstract: A digital radio receiver is adapted to receive radio signals modulated using continuous phase modulation. The receiver includes components for receiving analogue radio signals having various carrier frequencies and a plurality of correlators corresponding to different bit sequences. Each of the plurality of correlators share a common estimator for estimating a frequency offset between the radio signals carrier frequencies and nominal carrier frequencies. The receiver further includes components allowing the estimator to determine which of the correlators produce the most optimal output signal.
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公开(公告)号:US09681477B2
公开(公告)日:2017-06-13
申请号:US14896362
申请日:2014-06-04
Applicant: NORDIC SEMICONDUCTOR ASA
Inventor: David Alexandre Engelien-Lopes , Sverre Wichlund , Phil Corbishley
CPC classification number: H04W76/19 , H04B17/318 , H04B17/373 , H04L5/1438 , H04L5/1446 , H04W4/80 , H04W8/005 , H04W76/14 , H04W84/20
Abstract: A method of digital radio communication between a first device (2) and a second device (8), where each device comprises a radio transmitter (4, 10) and a radio receiver (6, 12), the method comprising: a) said first and second devices (2, 8) establishing a connection using a predetermined protocol having at least one predefined message format; b) if said connection is subsequently broken, said second device (8) transmitting an advertising message at a first data rate indicating a desire to reconnect; and c) if a reconnection is not established, said second device (8) transmitting a further advertising message at a second data rate indicating a desire to reconnect, wherein said second data rate is lower than the first data rate.
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公开(公告)号:US10095260B2
公开(公告)日:2018-10-09
申请号:US15736763
申请日:2016-06-16
Applicant: Nordic Semiconductor ASA
Inventor: Phil Corbishley , Sebastian Ioan Ene
Abstract: A start-up circuit arranged to initialize a circuit portion with a zero stable point and a non-zero stable point. The start-up circuit includes: a capacitive voltage divider including a first capacitor and a second capacitor that generate a divider bias voltage at a divider node; a differential amplifier including first and second amplifier inputs and an amplifier output connected to the divider node; a first driver transistor with its gate terminal connected to the divider node, and its drain terminal connected to a first start-up output and the first amplifier input; and a second driver transistor with its gate terminal connected to the divider node, and its drain terminal connected to a second start-up output and the second amplifier input. The differential amplifier controls the divider bias voltage and drives the circuit portion to the non-zero stable point.
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公开(公告)号:US20180188764A1
公开(公告)日:2018-07-05
申请号:US15736763
申请日:2016-06-16
Applicant: Nordic Semiconductor ASA
Inventor: Phil Corbishley , Sebastian Ioan Ene
IPC: G05F3/26
Abstract: A start-up circuit (2) arranged to initialise a circuit portion (4) with a zero stable point (200) and a non-zero stable point (202). The start-up circuit comprises: a capacitive voltage divider including a first capacitor (16) and a second capacitor (18) that generate a divider bias voltage at a divider node (48); a differential amplifier including first and second amplifier inputs (20, 22) and an amplifier output connected to the divider node; a first driver transistor (12) with its gate terminal connected to the divider node, and its drain terminal connected to a first start-up output and the first amplifier input; and a second driver transistor (14) with its gate terminal connected to the divider node, and its drain terminal connected to a second start-up output and the second amplifier input. The differential amplifier controls the divider bias voltage and drives the circuit portion to the non-zero stable point.
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公开(公告)号:US20170346456A1
公开(公告)日:2017-11-30
申请号:US15536504
申请日:2015-12-14
Applicant: Nordic Semiconductor ASA
Inventor: Phil Corbishley
IPC: H03F3/45
CPC classification number: H03F3/45183 , H03F3/45188 , H03F3/45475 , H03F3/45632 , H03F2200/18 , H03F2200/234 , H03F2200/297 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2200/75 , H03F2203/21112 , H03F2203/21157 , H03F2203/45036 , H03F2203/45051 , H03F2203/45084 , H03F2203/45088 , H03F2203/45101 , H03F2203/45134 , H03F2203/45174 , H03F2203/45201 , H03F2203/45202 , H03F2203/45208 , H03F2203/45264 , H03F2203/45406 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45528 , H03F2203/45562 , H03F2203/45631 , H03F2203/45644 , H03F2203/45652 , H03F2203/45682 , H03F2203/45694 , H03F2203/45702
Abstract: An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.
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公开(公告)号:US10177730B2
公开(公告)日:2019-01-08
申请号:US15535947
申请日:2015-12-14
Applicant: Nordic Semiconductor ASA
Inventor: Phil Corbishley
IPC: H04B1/06 , H04B7/00 , H03G3/30 , H04B17/318
Abstract: A packet-based radio receiver (10) comprises an automatic gain control system (17) and a signal-level detector (18, 19, 20) for monitoring an analog signal derived from radio signals received by the radio receiver. The signal-level detector (18, 19, 20) comprises a binary memory cell (22, 24) and a monitoring system. The monitoring system comprises a comparator (21, 23) arranged to receive a reference voltage at a first input and the analog signal at a second input. The monitoring system is arranged to (i) continuously monitor the voltage of the analog signal, (ii) detect when the monitored signal exceeds the reference voltage, and (iii) store a predetermined binary value in the memory cell (22, 24) in response to such a detection. The automatic gain control system (17) is arranged to control the gain of a variable-gain component (12, 13, 14) of the radio receiver in dependence on the contents of the binary memory cell (22, 24).
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公开(公告)号:US10153742B2
公开(公告)日:2018-12-11
申请号:US15536504
申请日:2015-12-14
Applicant: Nordic Semiconductor ASA
Inventor: Phil Corbishley
IPC: H03F3/45
Abstract: An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.
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