摘要:
An oscillator may output phased signals to a phase interpolator which is to generate an adjustable output clock signal having a phase offset relative to at least one of the phased signals received from the oscillator. A divider may then divide the frequency of the output signal generated by the phase interpolator by an integer factor.
摘要:
In a method for stabilizing a transfer function of a digital phase locked loop a random digital signal is fed into the phase locked loop. The phase locked loop comprises the transfer function and a phase locked loop gain which changes with time due to disturbances and the random digital signal comprises a predetermined variance. The transfer function depends from the phase locked loop gain. A cross correlation function is generated by cross correlating a signal of the phase locked loop with the random signal and an impulse response is estimated between the random signal and the signal of the phase locked loop by means of the cross correlation function and the predetermined variance of the random signal. The transfer function of the phase locked loop is set in dependence on the estimated impulse response.
摘要:
A method and a device for generating a clock signal (Fout) are provided, wherein a digital phase difference signal (X) is formed depending on a phase difference between a reference clock signal (Fin) and a feedback signal (Ffb) derived from the clock signal (Fout) and wherein the digital phase difference signal (X) is digitally filtered, in order to form a digital filtered phase difference signal (U). A digitally controlled oscillator (5) is activated by a digital control signal dependent on the digital filtered phase difference signal (U) to generate the clock signal (Fout). With a device of this kind clock signals with frequencies in the gigahertz range can be generated with a minimum of analog circuit parts.
摘要:
A method and a device for controlling an oscillator (1) are proposed, wherein a first control signal (b) is generated depending on an output signal (e) of the oscillator (1) and on a first reference signal (a), and a second control signal (d) is generated depending on the first control signal (b) and on a second reference signal (c), and wherein the oscillator (1) is subjected to the first control signal (b) and to the second control signal (d) and generates the output signal (e) with a frequency dependent on the first control signal (b) and on the second control signal (d). A low-noise phase locked loop with a large possible frequency range can be realised by such a method and such a device.
摘要:
Devices are provided comprising oscillator circuits coupled to a supply voltage via an adjustable resistance. Corresponding methods to control adjustable resistances are also provided.
摘要:
In an embodiment, a circuit comprising an oscillator is provided. The oscillator is controlled based on a feedback value and an input reference value. The feedback value or the reference value or both are generated using noise shaping.
摘要:
In an embodiment, a circuit is provided comprising a multi-phase oscillator configured to output a plurality of output signals having the same frequency and different phase offsets. A feedback value is generated based on at least two of said output signals. A reference value is generated based on a reference clock and a predetermined value. The reference value and the feedback value are combined.
摘要:
A cell array has a plurality of cell elements integrated in a wafer in a bidimensional cell matrix, wherein each integrated cell element comprises a mismatch between its actual physical property and a nominal property value. The mismatch of each cell element is a function of the distance of the respective cell element to a center of the cell array having a bidimensional mismatch distribution which is circular symmetric. The cell elements are connected in series in a wiring pattern along the circular symmetric mismatch distribution of the cell array to reduce an accumulated mismatch.
摘要:
The invention features a fractional frequency divider including a phase selection device where mutually phase-shifted signals are alternately switched through to a phase output, at the input of the phase selection device; and a control device for selecting individual phases where the control device changes the mutually phase-shifted signals.