公开(公告)号：US08589636B2

公开(公告)日：2013-11-19

申请号：US12801869

申请日：2010-06-29

Applicant: Akihiro Waku ,  Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Akihiro Waku ,  Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F12/00

CPC classification number: G06F12/0888

Abstract: A cache memory device includes: a data memory storing data written by an arithmetic processing unit; a connecting unit connecting an input path from the arithmetic processing unit to the data memory and an output path from the data memory to a main storage unit; a selecting unit provided on the output path to select data from the data memory or data from the arithmetic processing unit via the connecting unit, and to transfer the selected data to the output path; and a control unit controlling the selecting unit such that the data from the data memory is transferred to the output path when the data is written from the data memory to the main storage unit, and such that the data is transferred to the output path via the connecting unit when the data is written from the arithmetic processing unit to the main storage unit.

Abstract translation: 高速缓冲存储器装置包括：数据存储器，存储由算术处理单元写入的数据; 连接单元，连接从算术处理单元到数据存储器的输入路径以及从数据存储器到主存储单元的输出路径; 选择单元，设置在所述输出路径上以经由所述连接单元从所述数据存储器选择数据或来自所述算术处理单元的数据，并将所选择的数据传送到所述输出路径; 以及控制单元，其控制所述选择单元，使得当所述数据从所述数据存储器写入所述主存储单元时，来自所述数据存储器的数据被传送到所述输出路径，并且使得所述数据经由所述数据存储器被传送到所述输出路径 当从算术处理单元向主存储单元写入数据时，连接单元。

公开(公告)号：US20100332758A1

公开(公告)日：2010-12-30

申请号：US12801869

申请日：2010-06-29

Applicant: Akihiro Waku ,  Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Akihiro Waku ,  Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F12/08 ,  G06F12/00 ,  G06F9/302

CPC classification number: G06F12/0888

Abstract: A cache memory device includes: a data memory storing data written by an arithmetic processing unit; a connecting unit connecting an input path from the arithmetic processing unit to the data memory and an output path from the data memory to a main storage unit; a selecting unit provided on the output path to select data from the data memory or data from the arithmetic processing unit via the connecting unit, and to transfer the selected data to the output path; and a control unit controlling the selecting unit such that the data from the data memory is transferred to the output path when the data is written from the data memory to the main storage unit, and such that the data is transferred to the output path via the connecting unit when the data is written from the arithmetic processing unit to the main storage unit.

Abstract translation: 高速缓冲存储器装置包括：数据存储器，存储由算术处理单元写入的数据; 连接单元，连接从算术处理单元到数据存储器的输入路径以及从数据存储器到主存储单元的输出路径; 选择单元，设置在所述输出路径上以经由所述连接单元从所述数据存储器选择数据或来自所述算术处理单元的数据，并将所选择的数据传送到所述输出路径; 以及控制单元，其控制所述选择单元，使得当所述数据从所述数据存储器写入所述主存储单元时，来自所述数据存储器的数据被传送到所述输出路径，并且使得所述数据经由所述数据存储器被传送到所述输出路径 当从算术处理单元向主存储单元写入数据时，连接单元。

公开(公告)号：US07849230B2

公开(公告)日：2010-12-07

申请号：US12222228

申请日：2008-08-05

Applicant: Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F3/00 ,  G06F13/00 ,  G06F7/38

CPC classification number: G06F13/14

Abstract: A request control apparatus and a request control method are configured such that when an A type request that is an overtaking acceptable request allowed to overtake and to be overtaken among the other requests is turned to a retry matter on a pipeline, a request-order control unit performs an information renewal such that the A type request is rearranged to a place immediately preceding a B type request that is an overtaking inhibited request inhibited to overtake or to be overtaken among the other requests, and a request fetching unit fetches requests from ports by using the information renewed by the request-order control unit. Moreover, the request-order control unit is configured to perform request order control per request source.

Abstract translation: 请求控制装置和请求控制方法被配置为使得当超过可接受请求的A类型请求被允许超过并且在其他请求中被超时时，将被转到管线上的重试事务，请求命令控制 单元执行信息更新，使得A类型请求被重新排列到超过禁止请求的B类型请求之前禁止超过或超过其他请求的请求，并且请求提取单元从端口获取请求 使用由请求单控制单元更新的信息。 此外，请求顺序控制部被配置为对每个请求源执行请求顺序控制。

公开(公告)号：US20090013105A1

公开(公告)日：2009-01-08

申请号：US12222228

申请日：2008-08-05

Applicant: Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F3/00

CPC classification number: G06F13/14

Abstract: A request control apparatus and a request control method are configured such that when an A type request that is an overtaking acceptable request allowed to overtake and to be overtaken among the other requests is turned to a retry matter on a pipeline, a request-order control unit performs an information renewal such that the A type request is rearranged to a place immediately preceding a B type request that is an overtaking inhibited request inhibited to overtake or to be overtaken among the other requests, and a request fetching unit fetches requests from ports by using the information renewed by the request-order control unit. Moreover, the request-order control unit is configured to perform request order control per request source.

Abstract translation: 请求控制装置和请求控制方法被配置为使得当超过可接受请求的A类型请求被允许超过并且在其他请求之中被超时时，被转换为管道上的重试，请求命令控制 单元执行信息更新，使得A类型请求被重新排列到超过禁止请求的B类型请求之前禁止超过或超过其他请求的请求，并且请求提取单元从端口获取请求 使用由请求单控制单元更新的信息。 此外，请求顺序控制部被配置为对每个请求源执行请求顺序控制。

公开(公告)号：US08200900B2

公开(公告)日：2012-06-12

申请号：US12320941

申请日：2009-02-09

Applicant: Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F12/00

CPC classification number: G06F12/0855 ,  G06F12/0859 ,  G06F12/0888 ,  G06F2212/1024

Abstract: An apparatus for controlling a cache memory that stores therein data transferred from a main storing unit includes a computing processing unit that executes a computing process using data, a connecting unit that connects an input portion and an output portion of the cache memory, a control unit that causes data in the main storing unit to be transferred to the output portion of the cache memory through the connecting unit when the data in the main storing unit is input from the input portion of the cache memory into the cache memory, and a transferring unit that transfers data transferred by the control unit to the output portion of the cache memory, to the computing processing unit.

Abstract translation: 一种用于控制存储从主存储单元传送的数据的高速缓冲存储器的装置，包括使用数据执行计算处理的计算处理单元，连接高速缓存存储器的输入部分和输出部分的连接单元，控制单元 当主存储单元中的数据从高速缓冲存储器的输入部分输入到高速缓冲存储器中时，使主存储单元中的数据通过连接单元传送到高速缓冲存储器的输出部分;以及传送单元 其将由控制单元传送的数据传送到高速缓存存储器的输出部分，传送到计算处理单元。

公开(公告)号：US20090300287A1

公开(公告)日：2009-12-03

申请号：US12320941

申请日：2009-02-09

Applicant: Naoya Ishimura ,  Hiroyuki Kojima

Inventor： Naoya Ishimura ,  Hiroyuki Kojima

IPC: G06F12/08 ,  G06F9/44 ,  G06F12/00 ,  G06F9/312

CPC classification number: G06F12/0855 ,  G06F12/0859 ,  G06F12/0888 ,  G06F2212/1024

Abstract: An apparatus for controlling a cache memory that stores therein data transferred from a main storing unit includes a computing processing unit that executes a computing process using data, a connecting unit that connects an input portion and an output portion of the cache memory, a control unit that causes data in the main storing unit to be transferred to the output portion of the cache memory through the connecting unit when the data in the main storing unit is input from the input portion of the cache memory into the cache memory, and a transferring unit that transfers data transferred by the control unit to the output portion of the cache memory, to the computing processing unit.

Abstract translation: 一种用于控制存储从主存储单元传送的数据的高速缓冲存储器的装置，包括使用数据执行计算处理的计算处理单元，连接高速缓存存储器的输入部分和输出部分的连接单元，控制单元 当主存储单元中的数据从高速缓冲存储器的输入部分输入到高速缓冲存储器中时，使主存储单元中的数据通过连接单元传送到高速缓冲存储器的输出部分;以及传送单元 其将由控制单元传送的数据传送到高速缓存存储器的输出部分，传送到计算处理单元。

公开(公告)号：US09303752B2

公开(公告)日：2016-04-05

申请号：US13013353

申请日：2011-01-25

Applicant: Yoshiaki Nedachi ,  Hiroyuki Kojima ,  Dai Arai

Inventor： Yoshiaki Nedachi ,  Hiroyuki Kojima ,  Dai Arai

IPC: F16H59/72 ,  F16H57/00 ,  F16D48/06 ,  F16H61/06 ,  F16H61/688

CPC classification number: F16H57/0006 ,  F16D48/064 ,  F16D2500/1025 ,  F16D2500/1026 ,  F16D2500/1086 ,  F16D2500/3024 ,  F16D2500/30803 ,  F16D2500/50236 ,  F16D2500/7044 ,  F16H61/061 ,  F16H61/688 ,  F16H2306/18 ,  Y10T74/20024

Abstract: The twin clutch-type transmission can include a hydraulic twin clutch including the first clutch and the second clutch disposed on main shafts. The shift change controlling apparatus is configured to control shift change operation to and adjacent speed change stage by alternately changing an engagement state of the first clutch and the second clutch. The shift change controlling apparatus can also execute a pre-shift change of supplying a pre-pressure on one of the first and second clutches, while another of the first and second clutches is engaged. The pre-pressure provides a pre-engagement of the unengaged clutch. First and second clutch actuators are configured to actuate the first and second clutches, respectively. When the pre-shift change is executed, the pre-pressure is applied for a predetermined period and then removed prior to a driving of a shift gear or actuating a shift change.

Abstract translation: 双离合器式变速器可以包括液压双离合器，其包括设置在主轴上的第一离合器和第二离合器。 变速控制装置被配置为通过交替地改变第一离合器和第二离合器的接合状态来控制到相邻变速级的变速操作。 换档控制装置还可以执行在第一和第二离合器中的一个上提供预压力的预换档变化，同时第一和第二离合器中的另一个被接合。 预压力提供未接合离合器的预接合。 第一和第二离合器致动器被配置成分别致动第一和第二离合器。 当执行预换档更换时，将预压力施加预定时间段，然后在变速档驱动或启动换挡变化之前被移除。

公开(公告)号：US09125265B2

公开(公告)日：2015-09-01

申请号：US13569945

申请日：2012-08-08

Applicant: Hiroyuki Kojima ,  Noriaki Okada ,  Kazuhiko Saito ,  Shuhei Kawai ,  Feng Xu

Inventor： Hiroyuki Kojima ,  Noriaki Okada ,  Kazuhiko Saito ,  Shuhei Kawai ,  Feng Xu

IPC: H05B33/08 ,  H05B37/02

CPC classification number: H05B33/0818 ,  H05B33/0851

Abstract: In a control circuit for a light-emitting device, a reference voltage generation circuit detects a full-wave rectified voltage and generates a first voltage as well as generating a second voltage by converting the rectified voltage into a DC voltage. A voltage corresponding to a difference between the first voltage and the second voltage or a voltage corresponding to a ratio of the first voltage to the second voltage is generated as a reference voltage by a subtraction circuit or by a division circuit, respectively. As a result, a change in amplitude of the reference voltage can be suppressed when amplitude of the rectified voltage is varied due to a variation in an AC input voltage supplied from an AC power supply.

Abstract translation: 在发光装置的控制电路中，参考电压产生电路检测全波整流电压，并通过将整流电压转换成直流电压来产生第一电压以及产生第二电压。 相应于第一电压和第二电压之间的差的电压或对应于第一电压与第二电压的比率的电压分别由减法电路或分频电路产生作为参考电压。 结果，由于由交流电源供给的交流输入电压的变化，整流电压的振幅变化，可以抑制基准电压的振幅的变化。

公开(公告)号：US08770241B2

公开(公告)日：2014-07-08

申请号：US13118706

申请日：2011-05-31

Applicant: Masahiro Ebiko ,  Kenichiro Endo ,  Takumi Morito ,  Hiroshi Tokizaki ,  Hiroyuki Kojima ,  Kensuke Saitou

Inventor： Masahiro Ebiko ,  Kenichiro Endo ,  Takumi Morito ,  Hiroshi Tokizaki ,  Hiroyuki Kojima ,  Kensuke Saitou

IPC: B60C11/04 ,  B60C11/13 ,  B60C11/03 ,  B60C13/00

CPC classification number: B60C11/1392 ,  B60C11/0304 ,  B60C11/0309 ,  B60C11/042 ,  B60C11/13 ,  B60C11/1315 ,  B60C13/001 ,  B60C2011/0346 ,  B60C2011/0381 ,  B60C2011/0383 ,  B60C2011/133 ,  Y10S152/90

Abstract: A pneumatic tire includes a plurality of circumferential grooves and a first land portion. The circumferential grooves extend continuously in a tire circumferential direction. The first land portion extends in the tire circumferential direction between a pattern end and one of the circumferential grooves in a shoulder region located outside the circumferential grooves in a tire width direction. The first land portion has first lug grooves extending from the pattern end in the tire width direction and closed without communicating with the circumferential grooves are arranged in the tire circumferential direction. At least one circumferential groove is wave-shaped with a constant groove width in the tire width direction at a tread surface and formed in a wave shape in the circumferential direction at the tread surface and groove bottom. The wave-shaped circumferential groove has a shorter cycle length of waves at the groove bottom than at the tread surface.

Abstract translation: 一种充气轮胎包括多个周向槽和第一陆部。 周向槽沿轮胎周向连续延伸。 第一接地部沿着轮胎周向在轮胎宽度方向上位于周向槽外侧的肩部区域中的图案端与周向槽中的一个之间延伸。 第一接地部沿着轮胎周向布置有从轮胎宽度方向上的图案端延伸并且不与周向槽连通的第一横向花纹沟。 至少一个周向槽是在轮胎宽度方向上在轮胎宽度方向上具有恒定的槽宽度的波浪形状，并且在胎面和槽底部处沿圆周方向形成波形。 波形周向沟槽在槽底处的波浪周期长于在胎面表面。

公开(公告)号：US08505670B2

公开(公告)日：2013-08-13

申请号：US13051005

申请日：2011-03-18

Applicant: Sumitaka Ogawa ,  Hiroyuki Kojima

Inventor： Sumitaka Ogawa ,  Hiroyuki Kojima

IPC: B60R21/16 ,  B60R21/36

CPC classification number: B60R21/0132 ,  A41D13/018 ,  A41D2600/102 ,  B60R2021/0088 ,  B62J27/00

Abstract: A human body communications transmitter is provided to a vehicle body, for transmitting an activation signal by using the human body of a rider as a transmission path on the basis of an instruction from an on-vehicle ECU. A human body communications receiver is provided to an airbag jacket for receiving the activation signal which is transmitted by using the human body of the rider as the transmission path. The in-jacket ECU inflates and thus deploys the airbag jacket upon receipt of the activation signal for the airbag jacket through either human body communications or radio communications. The human body communications transmitter is connected to a right handlebar portion electrode, a left handlebar portion electrode, a seat portion electrode, a right footrest portion electrode and a left footrest portion electrode. The human body communications receiver is connected to an in-jacket electrode adjacent to the human body.

Abstract translation: 人体通信发射器被提供给车身，用于基于来自车载ECU的指示，通过使用骑手的人体作为传递路径发送激活信号。 人体通信接收器被提供到安全气囊外套，用于接收通过使用骑手的人体作为传送路径传送的激活信号。 内装式ECU通过人体通信或无线电通信收到安全气囊夹套的启动信号后，会充气并因此部署安全气囊。 人体通信发射机连接到右手柄部分电极，左手柄部分电极，座部电极，右脚踏部分电极和左脚踏部分电极。 人体通信接收器连接到与人体相邻的外套电极。