公开(公告)号：US11218153B1

公开(公告)日：2022-01-04

申请号：US17084525

申请日：2020-10-29

Applicant: NXP B.V.

Inventor： Ulrich Moehlmann ,  Lars Henrik Heinbockel ,  Torsten Gerhardt ,  Christian Scherner

IPC: H03L7/099 ,  G01R31/3187 ,  H03L7/093

Abstract: A built-in self-test (BIST) block is provided that is incorporated into an all-digital phase locked loop (ADPLL) located on chip with the ADPLL. The BIST performs testing functions without need for support external to the chip. Test setup, test control, and test evaluation are performed entirely on chip. The BIST provides information regarding success or failure of the testing and can provide error information regarding test cases that do not pass successfully.