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    SCHEDULING APPARATUS AND METHOD
    1.
    发明申请
    SCHEDULING APPARATUS AND METHOD 审中-公开

    公开(公告)号：US20180242337A1

    公开(公告)日：2018-08-23

    申请号：US15756016

    申请日：2015-08-26

    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    Inventor： Yuri ARIKAWA ,  Hiroyuki UZAWA ,  Kenji KAWAI ,  Satoshi SHIGEMATSU

    IPC: H04W72/12

    CPC classification number: H04W72/12 ,  H04B7/024 ,  H04W24/06

    Abstract: A convergence pattern selection unit (10A) sequentially generates a plurality of different patterns based on designated initial conditions, selects, as a convergence pattern, a pattern in which evaluation value has converged to an extreme value, and repeatedly executes selection of the convergence pattern by changing the initial conditions every time the convergence pattern is selected. A transmission pattern determination unit (10B) selects, as an optimum transmission pattern, one of the convergence patterns obtained by the convergence pattern selection unit (10A), which has the highest evaluation value. This allows searches for an optimum transmission pattern having a better evaluation value.

    ARITHMETIC CIRCUIT
    3.
    发明申请
    ARITHMETIC CIRCUIT 有权

    公开(公告)号：US20210064340A1

    公开(公告)日：2021-03-04

    申请号：US16959986

    申请日：2018-12-18

    Applicant: NTT ELECTRONICS CORPORATION ,  NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    Inventor： Kenji KAWAI ,  Ryo AWATA ,  Kazuhito TAKEI ,  Masaaki IIZUKA

    IPC: G06F7/544

    Abstract: An arithmetic circuit includes an LUT generation circuit (1) that, when coefficients c[n] (n=1, . . . , N) are paired two by two, outputs a value calculated for each of the pairs, and distributed arithmetic circuits (2-m) that calculate values z[m] of product-sum arithmetic, by which data x[m, n] of a data set X[m] containing M pairs of data x[m, n] are multiplied by the coefficients c[n] and the products are summed up, in parallel for each of the M pairs. The distributed arithmetic circuits (2-m) includes a plurality of binomial distributed arithmetic circuits that calculate the value of binomial product-sum arithmetic for each of the pairs, based on a value obtained by pairing N data x[m, n] corresponding to the circuit two by two, a value obtained by pairing the coefficients c[n] two by two, and the value calculated by the LUT generation circuit (1), a summing circuit that sums up the calculated values, and a figure matching circuit that matches the number of decimal figures of the sum with a predetermined number of decimal figures.

    ARITHMETIC CIRCUIT
    6.
    发明申请
    ARITHMETIC CIRCUIT 有权

    公开(公告)号：US20220100472A1

    公开(公告)日：2022-03-31

    申请号：US17643507

    申请日：2021-12-09

    Applicant: NTT ELECTRONICS CORPORATION ,  NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    Inventor： Kenji KAWAI ,  Ryo AWATA ,  Kazuhito TAKEI ,  Masaaki IIZUKA

    IPC: G06F7/57 ,  G06F1/04 ,  G06F7/485 ,  G06F9/30

    Abstract: An arithmetic circuit includes an LUT generation circuit (1) that, when coefficients c[n] (n=1, . . . , N) are paired two by two, outputs a value calculated for each of the pairs, and a distributed arithmetic circuit (2-m) that calculates values y[m] of product-sum arithmetic, by which data x[m, n] of a data set X[m] containing M pairs of data x[m, n] is multiplied by the coefficients c[n] and the products are summed up, in parallel for each of the M pairs. The distributed arithmetic circuit (2-m) includes a plurality of binomial distributed arithmetic circuits that calculate the value of binomial product-sum arithmetic in parallel for each of the pairs, based on a value obtained by pairing N data x[m, n] corresponding to the circuit two by two, a value obtained by pairing the coefficients c[n] two by two, and the value calculated by the LUT generation circuit (1), and a binomial distributed arithmetic result summing circuit that sums up the values calculated by the binomial distributed arithmetic circuits and outputs the sum as y[m].

    ARITHMETIC CIRCUIT
    7.
    发明申请
    ARITHMETIC CIRCUIT 有权

    公开(公告)号：US20210064342A1

    公开(公告)日：2021-03-04

    申请号：US16959968

    申请日：2018-12-18

    Applicant: NTT ELECTRONICS CORPORATION ,  NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    Inventor： Kenji KAWAI ,  Ryo AWATA ,  Kazuhito TAKEI ,  Masaaki IIZUKA

    IPC: G06F7/57 ,  G06F7/485 ,  G06F9/30 ,  G06F1/04

    Abstract: An arithmetic circuit includes an LUT generation circuit (1) that, when coefficients c[n] (n=1, . . . , N) are paired two by two, outputs a value calculated for each of the pairs, and a distributed arithmetic circuit (2-m) that calculates values y[m] of product-sum arithmetic, by which data x[m, n] of a data set X[m] containing M pairs of data x[m, n] is multiplied by the coefficients c[n] and the products are summed up, in parallel for each of the M pairs. The distributed arithmetic circuit (2-m) includes a plurality of binomial distributed arithmetic circuits that calculate the value of binomial product-sum arithmetic in parallel for each of the pairs, based on a value obtained by pairing N data x[m, n] corresponding to the circuit two by two, a value obtained by pairing the coefficients c[n] two by two, and the value calculated by the LUT generation circuit (1), and a binomial distributed arithmetic result summing circuit that sums up the values calculated by the binomial distributed arithmetic circuits and outputs the sum as y[m].

    RADIO NETWORK SYSTEM
    9.
    发明申请
    RADIO NETWORK SYSTEM 审中-公开

    公开(公告)号：US20180192328A1

    公开(公告)日：2018-07-05

    申请号：US15739677

    申请日：2016-06-22

    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

    Inventor： Hiroyuki UZAWA ,  Yuki ARIKAWA ,  Kenji KAWAI ,  Satoshi SHIGEMATSU

    IPC: H04W28/14 ,  H04W72/04 ,  H04J14/02

    Abstract: A CU (Central Unit) executes scheduling for allocating radio resources of RRUs (Remote Radio Units) to radio transmission of downlink data while broadcasting, to DMs (Data Managers) via MFH, downlink data from MBH. Each DM selects, based on an allocation result obtained by scheduling, the downlink data of an RRU (Remote Radio Unit) corresponding to the self DM from the accumulated downlink data from the CU, and transfers the selected downlink data to the corresponding RRU while discarding the downlink data of other RRUs. Based on the allocation result, each RRU performs radio transmission of the downlink data from the DM to a corresponding UE (User Equipment) using the designated radio resource. This makes it possible to efficiently transfer the downlink data from the CU to each RRU via the MFH constructed by a TDM system represented by TDM-PON.

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