公开(公告)号：US20140112659A1

公开(公告)日：2014-04-24

申请号：US14118889

申请日：2012-06-28

Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

Inventor： Tomoaki KAWAMURA ,  Shoko OHTERU ,  Ritsu KUSABA

IPC: H04L12/26 ,  H04B10/077

CPC classification number: H04L43/022 ,  H04B10/0773 ,  H04Q11/0067 ,  H04Q11/0071

Abstract: In a control frame processing unit (14), the number of control frames from a frame demultiplexing unit (13) is counted for each of LLIDs given to the control frames. If the number of frames during a predetermined count period is equal to or smaller than a preset threshold, some or all of the control frames are written in a storage device (30) as processing data. When the number of frames has exceeded the threshold, writing data of the control frames having the LLID in the storage device is stopped. Hence, even when the number of control frames from ONUs increases, software processing can be executed properly.

Abstract translation: 在控制帧处理单元（14）中，对于给予控制帧的每个LLID，对来自帧解复用单元（13）的控制帧的数量进行计数。 如果在预定计数期间中的帧数等于或小于预设阈值，则将一些或所有控制帧作为处理数据写入存储装置（30）。 当帧数超过阈值时，停止在存储装置中写入具有LLID的控制帧的数据。 因此，即使当来自ONU的控制帧的数量增加时，也可以正确执行软件处理。

公开(公告)号：US20180062746A1

公开(公告)日：2018-03-01

申请号：US15555960

申请日：2016-03-04

Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

Inventor： Shoko OHTERU ,  Namiko IKEDA ,  Saki HATTA ,  Satoshi SHIGEMATSU ,  Nobuyuki TANAKA ,  Kenji KAWAI ,  Junichi KATO ,  Tomoaki KAWAMURA ,  Hiroyuki UZAWA ,  Yuki ARIKAWA ,  Naoki MIURA

IPC: H04B10/27 ,  H04B10/038 ,  H04B10/40 ,  H04J14/02 ,  H04J14/08

CPC classification number: H04B10/27 ,  H04B10/03 ,  H04B10/038 ,  H04B10/272 ,  H04B10/40 ,  H04J14/0221 ,  H04J14/08 ,  H04L12/44 ,  H04Q11/0062 ,  H04Q2011/0081

Abstract: A selection and distribution circuit (13) is provided between N optical transceivers (11) and one PON control circuit (12). The selection and distribution circuit (13) selects the optical transceiver (11) corresponding to an upstream frame that time-divisionally arrives, thereby transferring the upstream frame opto-electrically converted by the transceiver (11) to the PON control circuit (12) and distributing a downstream frame from the PON control circuit (12) to each optical transceiver (11). A power supply control circuit (23) stops power supply to at least one of one of optical transceivers (11) that are not used to transfer the frame of the optical transceivers (11) and a circuit that is not used to transfer the frame in the selection and distribution circuit (13). This can reduce the system cost per ONU in the optical transmission system.

公开(公告)号：US20180212897A1

公开(公告)日：2018-07-26

申请号：US15745413

申请日：2016-07-14

Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION

Inventor： Saki HATTA ,  Tomoaki KAWAMURA ,  Kenji KAWAI ,  Nobuyuki TANAKA ,  Satoshi SHIGEMATSU ,  Namiko IKEDA ,  Shoko OHTERU ,  Junichi KATO

IPC: H04L12/911 ,  H04Q11/00

CPC classification number: H04L47/788 ,  H04B10/40 ,  H04B10/50 ,  H04B10/60 ,  H04L12/44 ,  H04Q11/0067 ,  H04Q2011/0086

Abstract: An upstream allocation circuit (14) and a downstream allocation circuit (15) are provided in an OLT (1). For example, a superimposed frame obtained by bundling upstream frames (upstream control frames+upstream data frames) from all ONUS is input to the upstream allocation circuit (14) via a frame reproduction circuit (12-1). The superimposed frame may be generated at the stage of optical signals or generated after converting optical signals into electrical signals. The upstream allocation circuit (14) allocates each of the upstream control frames bundled into the superimposed frame to a predetermined PON control circuit (13) based on information (PON port number or LLID) added to the frames. The downstream allocation circuit (15) allocates, to a preset frame reproduction circuit (12), each downstream control frames output from the PON control circuits (13).