公开(公告)号：US11486899B2

公开(公告)日：2022-11-01

申请号：US16778746

申请日：2020-01-31

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Chia-Lin Tsai ,  Wun-Ye Ku ,  Tien-Yu Chen ,  Chia-Yi Lin

IPC: G01R1/073 ,  G01R31/3193 ,  G01R31/319 ,  G01R1/067

Abstract: A wafer test system includes a probe apparatus, a data server, an automation subsystem, and a probe mark assessment subsystem. The probe apparatus includes a probe card, a tester, and a camera. The probe card includes probe pins for contacting test pads in the wafer, and the camera captures an image of the test pads. The automation subsystem obtains an image specification from the probe apparatus and triggers an automated assessment of a probe mark in the image of the test pads. The probe mark assessment subsystem performs the automated assessment of the probe mark in the image of the test pads. The probe mark assessment subsystem performs an image-processing operation to obtain a probe mark assessment result, and the automation subsystem stops the probe apparatus if the probe mark assessment result indicates a probe test failure.

公开(公告)号：US12019032B2

公开(公告)日：2024-06-25

申请号：US17113510

申请日：2020-12-07

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Hung-Chih Chang ,  Chug-Chi Chu ,  Chi-Min Tu ,  Wun-Ye Ku

IPC: G01N21/95 ,  G03F7/039

CPC classification number: G01N21/9505 ,  G03F7/0392 ,  G01N21/9503

Abstract: The present disclosure provides an electronic system with defect identification function and a method of qualifying a photoresist pattern formed using a lithography process. The electronic system includes an inspection apparatus and a processor associated with the inspection apparatus. The inspection apparatus is used for acquiring at least one image of the specimen on which a photoresist pattern is formed using a lithography process. The processor is configured to automatically apply machine learning processes implemented through one or more neural networks to identify at least one defect present in the photoresist pattern.

公开(公告)号：US12148144B2

公开(公告)日：2024-11-19

申请号：US17723723

申请日：2022-04-19

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Chia-Lin Tsai ,  Hung-Ru Li ,  Wun-Ye Ku

IPC: G06T7/00 ,  G06V10/22 ,  G06V10/74

Abstract: A wafer inspection system is provided. The wafer inspection system includes a memory unit configured to store an image of a device under test (DUT) on a wafer, an image-uploading unit configured to upload the image to a processing unit, and a processing unit. The processing unit is configured to identify a plurality of candidate regions on the image; generate a confidence score for each of the plurality of candidate regions, wherein the confidence score indicates a probability of a candidate region including a probe mark; select a first candidate region having the highest confidence score as a selected region; determine whether a second candidate region in the plurality of candidate regions includes the same probe mark as the first candidate region; and eliminate the second candidate region if the second candidate region includes the same probe mark as the first candidate region.

公开(公告)号：US12211200B2

公开(公告)日：2025-01-28

申请号：US17724154

申请日：2022-04-19

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Chia-Lin Tsai ,  Hung-Ru Li ,  Wun-Ye Ku

IPC: G06T7/00 ,  G06V10/22

Abstract: A wafer inspection method is provided. The wafer inspection method includes identifying a plurality of candidate regions on an image of a DUT on a wafer; generating a confidence score for each of the plurality of candidate regions, wherein the confidence score indicates a probability of a candidate region including a probe mark; selecting a first candidate region having the highest confidence score as a selected region; determining whether a second candidate region in the plurality of candidate regions includes the same probe mark as the first candidate region; and eliminating the second candidate region if the second candidate region includes the same probe mark as the first candidate region.